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author | Yann Herklotz <git@yannherklotz.com> | 2021-10-30 21:42:52 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2021-10-30 21:42:52 +0100 |
commit | 6e2259a57b6ca00c068b176b9d5087ed632598c2 (patch) | |
tree | 20f2f9815c243dc13b9f93b352d20e8b92d9f16e /src/extraction/Extraction.v | |
parent | 81aa3b8c3e20f86a71607bea0c9aa9bdf090781f (diff) | |
download | vericert-6e2259a57b6ca00c068b176b9d5087ed632598c2.tar.gz vericert-6e2259a57b6ca00c068b176b9d5087ed632598c2.zip |
Fix compilation issues with new types
Diffstat (limited to 'src/extraction/Extraction.v')
-rw-r--r-- | src/extraction/Extraction.v | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index 97f0d2a..3544f9d 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -25,7 +25,9 @@ From vericert Require RTLBlockInstr HTLgen Pipeline - HLSOpts. + HLSOpts + Predicate +. From Coq Require DecidableClass. @@ -192,7 +194,7 @@ Separate Extraction RTLBlockgen.transl_program RTLBlockInstr.successors_instr HTLgen.tbl_to_case_expr Pipeline.pipeline - RTLBlockInstr.sat_pred_simple + Predicate.sat_pred_simple Verilog.stmnt_to_list Compiler.transf_c_program Compiler.transf_cminor_program |