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author | Yann Herklotz <git@yannherklotz.com> | 2021-01-30 21:54:51 +0000 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2021-01-30 21:54:51 +0000 |
commit | d2a3355b00ad5edfd4de4627df0cf45830114ac5 (patch) | |
tree | ad8b6f32e6d7eb2e13e2f2ee06cf8289bf5d4587 /src/extraction | |
parent | 8151bbfa57bac1a302d3330f8b51fa23eb3a0082 (diff) | |
download | vericert-d2a3355b00ad5edfd4de4627df0cf45830114ac5.tar.gz vericert-d2a3355b00ad5edfd4de4627df0cf45830114ac5.zip |
Fix compilation of Coq
Diffstat (limited to 'src/extraction')
-rw-r--r-- | src/extraction/Extraction.v | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/extraction/Extraction.v b/src/extraction/Extraction.v index f4f1c26..6ae2856 100644 --- a/src/extraction/Extraction.v +++ b/src/extraction/Extraction.v @@ -21,6 +21,8 @@ From vericert Require Compiler RTLBlockgen RTLBlock + RTLPar + RTLBlockInstr HTLgen Pipeline. @@ -180,7 +182,7 @@ Cd "src/extraction". Separate Extraction Verilog.module vericert.Compiler.transf_hls vericert.Compiler.transf_hls_temp - RTLBlockgen.transl_program RTLBlock.successors_instr + RTLBlockgen.transl_program RTLBlockInstr.successors_instr HTLgen.tbl_to_case_expr Pipeline.pipeline |