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author | Yann Herklotz <git@yannherklotz.com> | 2021-03-28 13:49:42 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2021-03-28 13:49:42 +0100 |
commit | 624e3215674e1f315dfa439cd1cf3620db293122 (patch) | |
tree | fcf02de3dcf8597478e4608c11e6187a8f3dca4c /src/hls | |
parent | 6222d882c90e7d419236344ba91ad1a90b2c44ff (diff) | |
download | vericert-624e3215674e1f315dfa439cd1cf3620db293122.tar.gz vericert-624e3215674e1f315dfa439cd1cf3620db293122.zip |
Update declared size
Diffstat (limited to 'src/hls')
-rw-r--r-- | src/hls/Memorygen.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/hls/Memorygen.v b/src/hls/Memorygen.v index 50986a7..37201a0 100644 --- a/src/hls/Memorygen.v +++ b/src/hls/Memorygen.v @@ -279,7 +279,7 @@ Definition transf_module (m: module): module := (AssocMap.set d_out (None, VScalar 32) (AssocMap.set d_in (None, VScalar 32) (AssocMap.set addr (None, VScalar 32) m.(mod_scldecls)))))) - (AssocMap.set m.(mod_stk) (None, VArray 32 new_size)%nat m.(mod_arrdecls)) + (AssocMap.set m.(mod_stk) (None, VArray 32 (2 ^ Nat.log2_up new_size))%nat m.(mod_arrdecls)) (Some ram) (is_wf _ nc nd) | _, _ => m |