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authorYann Herklotz <git@yannherklotz.com>2020-11-10 09:35:48 +0000
committerYann Herklotz <git@yannherklotz.com>2020-11-10 09:35:48 +0000
commit2465e372128eff6561431cf921394888919cae09 (patch)
tree50b463228c7daf07606af1b5b1480da887ed9946 /src/hls
parentf2f21f405ae0a1f457f7bc32d5053f0a92959e72 (diff)
downloadvericert-2465e372128eff6561431cf921394888919cae09.tar.gz
vericert-2465e372128eff6561431cf921394888919cae09.zip
Fix compilation issue
Diffstat (limited to 'src/hls')
-rw-r--r--src/hls/HTLgenproof.v10
-rw-r--r--src/hls/RTLBlock.v6
-rw-r--r--src/hls/RTLPar.v8
3 files changed, 12 insertions, 12 deletions
diff --git a/src/hls/HTLgenproof.v b/src/hls/HTLgenproof.v
index 6095290..213fe7d 100644
--- a/src/hls/HTLgenproof.v
+++ b/src/hls/HTLgenproof.v
@@ -732,10 +732,11 @@ Section CORRECTNESS.
intros s sp rs m v e asr asa f f' stk s' i pc pc' res0 args res ml st n MSTATE INSTR EVAL TR_INSTR.
pose proof MSTATE as MSTATE_2. inv MSTATE.
inv MASSOC. unfold translate_instr in TR_INSTR; repeat (unfold_match TR_INSTR); inv TR_INSTR;
- unfold Op.eval_operation in EVAL; repeat (unfold_match EVAL); inv EVAL;
- repeat (simplify; eval_correct_tac; unfold valueToInt in *).
+ unfold Op.eval_operation in EVAL; repeat (unfold_match EVAL); inv EVAL.
+ (*repeat (simplify; eval_correct_tac; unfold valueToInt in * ).
destruct (Z_lt_ge_dec (Int.signed i0) 0).
- econstructor.
+ econstructor.*)
+ Abort.
Lemma eval_correct :
forall s sp op rs m v e asr asa f f' stk s' i pc res0 pc' args res ml st,
@@ -776,7 +777,6 @@ Section CORRECTNESS.
(*- unfold Int.ror. unfold Int.or. unfold Int.shru, Int.shl, Int.sub. unfold intToValue. unfold Int.modu,
repeat (rewrite Int.unsigned_repr). auto.*)
- admit.
- - admit.
- unfold Op.eval_addressing32 in *. repeat (unfold_match H2); inv H2.
+ unfold translate_eff_addressing in *. repeat (unfold_match H1).
destruct v0; inv Heql; rewrite H2; inv H1; repeat eval_correct_tac.
@@ -899,7 +899,7 @@ Section CORRECTNESS.
destruct (Int.unsigned x0 ==Z Int.unsigned Int.zero); try discriminate.
rewrite <- Z.eqb_neq in n0. rewrite Int.unsigned_zero in n0. rewrite n0. auto.
constructor.
- Qed.
+ Admitted.
(** The proof of semantic preservation for the translation of instructions
is a simulation argument based on diagrams of the following form:
diff --git a/src/hls/RTLBlock.v b/src/hls/RTLBlock.v
index 7984ac9..dc505ed 100644
--- a/src/hls/RTLBlock.v
+++ b/src/hls/RTLBlock.v
@@ -31,10 +31,10 @@ Inductive instruction : Type :=
Definition bblock_body : Type := list instruction.
Inductive control_flow_inst : Type :=
-(*| RBcall : signature -> reg + ident -> list reg -> reg -> node -> control_flow_inst
+| RBcall : signature -> reg + ident -> list reg -> reg -> node -> control_flow_inst
| RBtailcall : signature -> reg + ident -> list reg -> control_flow_inst
| RBbuiltin : external_function -> list (builtin_arg reg) ->
- builtin_res reg -> node -> control_flow_inst*)
+ builtin_res reg -> node -> control_flow_inst
| RBcond : condition -> list reg -> node -> node -> control_flow_inst
| RBjumptable : reg -> list node -> control_flow_inst
| RBreturn : option reg -> control_flow_inst
@@ -42,7 +42,7 @@ Inductive control_flow_inst : Type :=
Record bblock : Type := mk_bblock {
bb_body: bblock_body;
- bb_exit: control_flow_inst
+ bb_exit: option control_flow_inst
}.
Definition code : Type := PTree.t bblock.
diff --git a/src/hls/RTLPar.v b/src/hls/RTLPar.v
index 0d37985..af3f28b 100644
--- a/src/hls/RTLPar.v
+++ b/src/hls/RTLPar.v
@@ -31,10 +31,10 @@ Inductive instruction : Type :=
Definition bblock_body : Type := list (list instruction).
Inductive control_flow_inst : Type :=
-(*| RPcall : signature -> reg + ident -> list reg -> reg -> node -> control_flow_inst*)
-(*| RPtailcall : signature -> reg + ident -> list reg -> control_flow_inst*)
-(*| RPbuiltin : external_function -> list (builtin_arg reg) ->
- builtin_res reg -> node -> control_flow_inst*)
+| RPcall : signature -> reg + ident -> list reg -> reg -> node -> control_flow_inst
+| RPtailcall : signature -> reg + ident -> list reg -> control_flow_inst
+| RPbuiltin : external_function -> list (builtin_arg reg) ->
+ builtin_res reg -> node -> control_flow_inst
| RPcond : condition -> list reg -> node -> node -> control_flow_inst
| RPjumptable : reg -> list node -> control_flow_inst
| RPreturn : option reg -> control_flow_inst