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authorYann Herklotz <git@yannherklotz.com>2022-03-22 19:01:10 +0000
committerYann Herklotz <git@yannherklotz.com>2022-03-22 19:01:10 +0000
commit115f5b18952bdeea150ce54b156cb9a96c8d3e96 (patch)
tree3d01061b5dca1f338f87f6bd7b68d9e93622a715 /src
parent0f223a52dc59646ce2731ebd9b2141ce1ad82ba1 (diff)
downloadvericert-115f5b18952bdeea150ce54b156cb9a96c8d3e96.tar.gz
vericert-115f5b18952bdeea150ce54b156cb9a96c8d3e96.zip
Add back equalities
Diffstat (limited to 'src')
-rw-r--r--src/hls/RTLBlockgen.v2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/hls/RTLBlockgen.v b/src/hls/RTLBlockgen.v
index 706cb09..fa462e7 100644
--- a/src/hls/RTLBlockgen.v
+++ b/src/hls/RTLBlockgen.v
@@ -31,7 +31,6 @@ Require Import vericert.hls.RTLBlock.
(* rtlblockgen-imports ends here *)
(* [[file:../../lit/scheduling.org::rtlblockgen-equalities-insert][rtlblockgen-equalities-insert]] *)
-(* [[[[file:~/projects/vericert/lit/scheduling.org::rtlblockgen-equalities][rtlblockgen-equalities]]][rtlblockgen-equalities]] *)
Lemma comparison_eq: forall (x y : comparison), {x = y} + {x <> y}.
Proof.
decide equality.
@@ -149,7 +148,6 @@ Defined.
Definition ceq {A: Type} (eqd: forall a b: A, {a = b} + {a <> b}) (a b: A): bool :=
if eqd a b then true else false.
-(* rtlblockgen-equalities ends here *)
(* rtlblockgen-equalities-insert ends here *)
(* [[file:../../lit/scheduling.org::rtlblockgen-main][rtlblockgen-main]] *)