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| author | Yann Herklotz <git@yannherklotz.com> | 2022-03-22 17:14:08 +0000 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2022-03-22 17:14:08 +0000 |
| commit | 79ebc1c11ac3daccbc13b56043bdc89b14b23c60 (patch) | |
| tree | 59b3780a16d80f6054ef33e33692d6f1a9b8ef89 /src | |
| parent | 2d647ce5fdf5343a7d9961a63d66b5191706aeaf (diff) | |
| download | vericert-79ebc1c11ac3daccbc13b56043bdc89b14b23c60.tar.gz vericert-79ebc1c11ac3daccbc13b56043bdc89b14b23c60.zip | |
Add literate Coq file
Diffstat (limited to 'src')
| -rw-r--r-- | src/hls/RTLBlockgen.v | 2 | ||||
| -rw-r--r-- | src/hls/RTLPargenproof.v | 8 |
2 files changed, 3 insertions, 7 deletions
diff --git a/src/hls/RTLBlockgen.v b/src/hls/RTLBlockgen.v index af2c5af..f45151d 100644 --- a/src/hls/RTLBlockgen.v +++ b/src/hls/RTLBlockgen.v @@ -38,7 +38,6 @@ Definition find_block (max: positive) (nodes: list positive) (index: positive) : (*Compute find_block (2::94::28::40::19::nil) 40.*) -(* [[[[file:~/projects/vericert/lit/scheduling.org::rtlblockgen-equalities][rtlblockgen-equalities]]][rtlblockgen-equalities]] *) Lemma comparison_eq: forall (x y : comparison), {x = y} + {x <> y}. Proof. decide equality. @@ -156,7 +155,6 @@ Defined. Definition ceq {A: Type} (eqd: forall a b: A, {a = b} + {a <> b}) (a b: A): bool := if eqd a b then true else false. -(* rtlblockgen-equalities ends here *) Definition check_instr (n: positive) (istr: RTL.instruction) (istr': instr) := match istr, istr' with diff --git a/src/hls/RTLPargenproof.v b/src/hls/RTLPargenproof.v index 63a294e..7b262db 100644 --- a/src/hls/RTLPargenproof.v +++ b/src/hls/RTLPargenproof.v @@ -16,7 +16,7 @@ * along with this program. If not, see <https://www.gnu.org/licenses/>. *) -(* [[file:../../lit/scheduling.org::rtlpargenproof-main][rtlpargenproof-main]] *) +(* [[file:../../lit/scheduling.org::rtlpargenproof-imports][rtlpargenproof-imports]] *) Require Import compcert.backend.Registers. Require Import compcert.common.AST. Require Import compcert.common.Errors. @@ -37,7 +37,9 @@ Require Import vericert.hls.Abstr. #[local] Open Scope positive. #[local] Open Scope forest. #[local] Open Scope pred_op. +(* rtlpargenproof-imports ends here *) +(* [[file:../../lit/scheduling.org::rtlpargenproof-main][rtlpargenproof-main]] *) (*Definition is_regs i := match i with mk_instr_state rs _ => rs end. Definition is_mem i := match i with mk_instr_state _ m => m end. @@ -47,10 +49,6 @@ Inductive state_lessdef : instr_state -> instr_state -> Prop := (forall x, rs1 !! x = rs2 !! x) -> state_lessdef (mk_instr_state rs1 m1) (mk_instr_state rs2 m1). -(** *** RTLBlock to abstract translation - -Correctness of translation from RTLBlock to the abstract interpretation language. *) - Ltac inv_simp := repeat match goal with | H: exists _, _ |- _ => inv H |