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| author | Yann Herklotz <git@yannherklotz.com> | 2023-09-22 10:57:50 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2023-09-22 10:58:41 +0100 |
| commit | 73d09048bb78826df7ef908918b89fcd2967978b (patch) | |
| tree | 1085f3c5a2ddffed465fa47a08f03c49b3654b21 /src | |
| parent | 24a34a9e3cbec7aaf2e4c3db20ccc5b541b25f20 (diff) | |
| download | vericert-73d09048bb78826df7ef908918b89fcd2967978b.tar.gz vericert-73d09048bb78826df7ef908918b89fcd2967978b.zip | |
Add timing of scheduling to Compiler.v
Diffstat (limited to 'src')
| -rw-r--r-- | src/Compiler.v | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/Compiler.v b/src/Compiler.v index d76db43..d3bcf95 100644 --- a/src/Compiler.v +++ b/src/Compiler.v @@ -293,7 +293,7 @@ Definition transf_hls_temp (p : Csyntax.program) : res Verilog.program := @@ print (print_GibleSeq 4) @@@ DeadBlocks.transf_program @@ print (print_GibleSeq 5) - @@@ GiblePargen.transl_program + @@@ time "Scheduling" GiblePargen.transl_program @@ print (print_GiblePar 0) @@@ HTLPargen.transl_program @@ print (print_DHTL 0) |