aboutsummaryrefslogtreecommitdiffstats
path: root/benchmarks/polybench-syn/syn-vivado.tcl
diff options
context:
space:
mode:
Diffstat (limited to 'benchmarks/polybench-syn/syn-vivado.tcl')
-rw-r--r--benchmarks/polybench-syn/syn-vivado.tcl6
1 files changed, 6 insertions, 0 deletions
diff --git a/benchmarks/polybench-syn/syn-vivado.tcl b/benchmarks/polybench-syn/syn-vivado.tcl
new file mode 100644
index 0000000..733a94e
--- /dev/null
+++ b/benchmarks/polybench-syn/syn-vivado.tcl
@@ -0,0 +1,6 @@
+create_project -in_memory -part xc7k70t
+read_verilog top.v
+synth_design -part xc7k70t -top main
+create_clock -name clk -period 5.000 [get_ports clk]
+report_timing -nworst 1 -path_type full -input_pins -file worst_timing.txt
+write_verilog -force out.v