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-rw-r--r--doc/index.rst8
1 files changed, 5 insertions, 3 deletions
diff --git a/doc/index.rst b/doc/index.rst
index 06aa509..f5a7776 100644
--- a/doc/index.rst
+++ b/doc/index.rst
@@ -33,9 +33,11 @@ have all been proven correct, providing a verified translation from C to Verilog
:caption: Sources
src/Compiler
- src/hls/RTLBlockInstr
- src/hls/RTLBlockgen
- src/hls/RTLBlockgenproof
+ src/hls/Gible.v
+ src/hls/GibleSeq.v
+ src/hls/GiblePar.v
+ src/hls/GibleSeqgen.v
+ src/hls/GibleSeqgenproof.v
Publications
------------