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1 files changed, 2 insertions, 2 deletions
diff --git a/docs/documentation.org b/docs/documentation.org
index d4ef799..3a0633f 100644
--- a/docs/documentation.org
+++ b/docs/documentation.org
@@ -18,7 +18,7 @@ application-specific integrated circuit (ASIC).
#+attr_html: :width 600
#+caption: Current design of Vericert, where HTL is an intermediate language representing a finite state machine with data-path (FSMD) and Verilog is the target language.
#+name: fig:design
-[[/images/toolflow.svg]]
+[[./images/toolflow.svg]]
The design shown in Figure [[fig:design]] shows how Vericert leverages an existing verified C compiler
called [[https://compcert.org/compcert-C.html][CompCert]] to perform this translation.
@@ -554,4 +554,4 @@ A small standalone Coq file that exhibits many of the style points.
:appendix: t
:END:
-#+include: fdl.org
+#+include: res/fdl.org