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Diffstat (limited to 'src/hls/HTL.v')
| -rw-r--r-- | src/hls/HTL.v | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/hls/HTL.v b/src/hls/HTL.v index c8a0041..1949785 100644 --- a/src/hls/HTL.v +++ b/src/hls/HTL.v @@ -67,6 +67,7 @@ Record module: Type := mod_clk : reg; mod_scldecls : AssocMap.t (option Verilog.io * Verilog.scl_decl); mod_arrdecls : AssocMap.t (option Verilog.io * Verilog.arr_decl); + mod_ram : option (reg * reg * reg * reg); mod_wf : (map_well_formed mod_controllogic /\ map_well_formed mod_datapath); }. |