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-rw-r--r--src/hls/PrintVerilog.ml6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/hls/PrintVerilog.ml b/src/hls/PrintVerilog.ml
index 61f5b5e..f618d54 100644
--- a/src/hls/PrintVerilog.ml
+++ b/src/hls/PrintVerilog.ml
@@ -164,13 +164,13 @@ let decl i = function
let pprint_module_item i = function
| Vdeclaration d -> decl i d
| Valways (e, s) ->
- concat [indent i; "always "; pprint_edge_top i e; "begin\n";
+ concat [indent i; "always "; pprint_edge_top i e; " begin\n";
pprint_stmnt (i+1) s; indent i; "end\n"]
| Valways_ff (e, s) ->
- concat [indent i; "always "; pprint_edge_top i e; "begin\n";
+ concat [indent i; "always "; pprint_edge_top i e; " begin\n";
pprint_stmnt (i+1) s; indent i; "end\n"]
| Valways_comb (e, s) ->
- concat [indent i; "always "; pprint_edge_top i e; "begin\n";
+ concat [indent i; "always "; pprint_edge_top i e; " begin\n";
pprint_stmnt (i+1) s; indent i; "end\n"]
let rec intersperse c = function