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-rw-r--r--src/translation/Veriloggenproof.v6
1 files changed, 4 insertions, 2 deletions
diff --git a/src/translation/Veriloggenproof.v b/src/translation/Veriloggenproof.v
index db96949..ca4ecab 100644
--- a/src/translation/Veriloggenproof.v
+++ b/src/translation/Veriloggenproof.v
@@ -69,12 +69,14 @@ Section CORRECTNESS.
match_states S1 R1 ->
exists R2, Smallstep.plus step tge R1 t R2 /\ match_states S2 R2.
Proof.
- induction 1; intros R1 MSTATE; inv MSTATE; econstructor; split.
+(* induction 1; intros R1 MSTATE; inv MSTATE; econstructor; split.
- apply Smallstep.plus_one. econstructor. eassumption. trivial.
- * econstructor. econstructor.
+ * econstructor. econstructor.*)
+ Admitted.
Theorem transf_program_correct:
forward_simulation (HTL.semantics prog) (Verilog.semantics tprog).
+ Admitted.
End CORRECTNESS.