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Diffstat (limited to 'src/verilog/PrintVerilog.ml')
-rw-r--r-- | src/verilog/PrintVerilog.ml | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/verilog/PrintVerilog.ml b/src/verilog/PrintVerilog.ml index 5265c97..f348ee6 100644 --- a/src/verilog/PrintVerilog.ml +++ b/src/verilog/PrintVerilog.ml @@ -1,5 +1,5 @@ (* -*- mode: tuareg -*- - * CoqUp: Verified high-level synthesis. + * Vericert: Verified high-level synthesis. * Copyright (C) 2019-2020 Yann Herklotz <yann@yannherklotz.com> * * This program is free software: you can redistribute it and/or modify @@ -26,7 +26,7 @@ open Clflags open Printf -open CoqupClflags +open VericertClflags let concat = String.concat "" |