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* Start converting commentsYann Herklotz2022-02-253-85/+45
* Add more documentation and add coqdoc stylesheetYann Herklotz2022-02-256-3/+928
* Add back pure documentationYann Herklotz2022-02-255-0/+1102
* Delete docs submoduleYann Herklotz2022-02-242-3/+0
* Update gather data scriptYann Herklotz2022-02-231-25/+24
* Add PrintLoops for bourdoncle codeYann Herklotz2021-12-091-0/+22
* Update the documentationYann Herklotz2021-12-091-0/+0
* Add bourdoncle to buildYann Herklotz2021-12-098-28/+64
* Remove debug directoryYann Herklotz2021-12-092-64/+0
* Update benchmark runsYann Herklotz2021-12-092-34/+80
* Update README with correct linkYann Herklotz2021-12-092-6/+5
* Add README.mdYann Herklotz2021-12-091-0/+147
* Add a script to gather synthesis dataYann Herklotz2021-11-181-0/+66
* Add a printer for RTLParFUYann Herklotz2021-11-181-0/+120
* Fix operation chaining in schedulerYann Herklotz2021-11-181-8/+12
* Remove unnecessary proof from RTLParFUgenYann Herklotz2021-11-181-1/+0
* Fix the pipelining link in the READMEYann Herklotz2021-11-181-1/+2
* Improve the benchmark MakefileYann Herklotz2021-11-182-4/+8
* Fix compilation with new HTL languageYann Herklotz2021-11-1812-161/+163
* Add bourdoncle codeYann Herklotz2021-11-184-0/+304
* Rename pipeliningYann Herklotz2021-11-1813-0/+0
* Fix generation of RTLParFUYann Herklotz2021-11-177-46/+30
* Merge remote-tracking branch 'origin/dev/divider' into dev/schedulingYann Herklotz2021-11-1611-73/+353
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| * Get some Verilog output with dividersdev/dividerYann Herklotz2021-02-222-11/+22
| * Fix Scheduling to add missing statesYann Herklotz2021-02-221-14/+34
| * Fix arguments to RBassign and pipedYann Herklotz2021-02-224-5/+10
| * Add operation pipeliningYann Herklotz2021-02-222-8/+137
| * Add RTLPar printingYann Herklotz2021-02-225-4/+84
| * Add operator pipelining passYann Herklotz2021-02-211-0/+67
| * Add new instructions for pipelinesYann Herklotz2021-02-219-24/+33
| * Correctly add initial scheduling variablesYann Herklotz2021-02-211-4/+20
| * Merge branch 'develop' into dev/dividerYann Herklotz2021-02-2116-276/+1187
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| * | Add beginning to scheduling divisionYann Herklotz2021-02-157-310/+181
* | | Finish generation of RTLParFU with RAM insertionYann Herklotz2021-11-151-24/+92
* | | Fix max funtion in RTLParFUYann Herklotz2021-11-151-1/+2
* | | Fix HTL generation from RTLParFUYann Herklotz2021-11-151-11/+34
* | | Use new RAM defined in FunctionalUnits.vYann Herklotz2021-11-152-2/+4
* | | Remove unnecessary RAMYann Herklotz2021-11-151-16/+1
* | | Add helper functions to FunctionalUnitsYann Herklotz2021-11-151-3/+22
* | | Add RTLParFU to top-levelYann Herklotz2021-11-141-0/+2
* | | Replace HTLPargen by HTLParFUgenYann Herklotz2021-11-142-896/+19
* | | Improve simplification of predicatesYann Herklotz2021-11-141-2/+10
* | | Add proper functional unit generationYann Herklotz2021-11-142-23/+98
* | | Add helper functions to FunctionalUnitsYann Herklotz2021-11-141-0/+74
* | | Improve Makefile for polybenchYann Herklotz2021-11-142-14/+14
* | | Add the tseytin transformation insteadYann Herklotz2021-11-142-219/+359
* | | Add RTLPar with functional unitsYann Herklotz2021-11-133-0/+1302
* | | Add commented out pretty printing for AbstrYann Herklotz2021-11-131-0/+39
* | | Move lp_solve to the /temp directoryYann Herklotz2021-11-131-4/+6
* | | Small progress on the proof of correctnessYann Herklotz2021-11-131-1/+5
generated by cgit (git 2.34.1) at 2024-07-02 22:53:50 +0000