Commit message (Expand) | Author | Age | Files | Lines | |
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* | Add .gitignore for *.vok *.vos | Yann Herklotz | 2020-05-24 | 1 | -0/+2 |
* | Add HTLgen | Yann Herklotz | 2020-05-24 | 2 | -6/+341 |
* | Add statemonad declaration | Yann Herklotz | 2020-05-24 | 2 | -0/+103 |
* | Finish the proof with most assumptions | Yann Herklotz | 2020-05-21 | 3 | -35/+161 |
* | Add proof of translation correctness | Yann Herklotz | 2020-05-20 | 2 | -17/+200 |
* | Fix the semantics to properly evaluate the state | Yann Herklotz | 2020-05-20 | 1 | -2/+4 |
* | Switch position of empty rule | Yann Herklotz | 2020-05-20 | 1 | -4/+4 |
* | Fix definitions in Value and add lemmas | Yann Herklotz | 2020-05-20 | 1 | -7/+35 |
* | Add theorems about merge | Yann Herklotz | 2020-05-20 | 1 | -2/+12 |
* | Update coq version to 11 | Yann Herklotz | 2020-05-20 | 2 | -2/+2 |
* | Add simulation diagram | Yann Herklotz | 2020-05-08 | 1 | -5/+53 |
* | Add lessdef for values | Yann Herklotz | 2020-05-08 | 1 | -3/+10 |
* | Add AssocMap | Yann Herklotz | 2020-05-08 | 4 | -47/+93 |
* | Add match_states Inductive | Yann Herklotz | 2020-05-07 | 1 | -0/+29 |
* | Remove HTLgen and create the specification | Yann Herklotz | 2020-05-07 | 2 | -163/+92 |
* | Redefine HTL for intermediate Verilog language | Yann Herklotz | 2020-05-07 | 2 | -76/+87 |
* | Use associations instead of state | Yann Herklotz | 2020-05-07 | 2 | -70/+69 |
* | Rename assoclist to assocset | Yann Herklotz | 2020-05-07 | 2 | -28/+28 |
* | Remove Admitted Maps Lemma | Yann Herklotz | 2020-05-07 | 1 | -6/+0 |
* | Add changes to value | Yann Herklotz | 2020-05-06 | 1 | -2/+9 |
* | Refine test file | Yann Herklotz | 2020-05-05 | 1 | -5/+2 |
* | Minimised manual simulation | Yann Herklotz | 2020-05-05 | 2 | -45/+14 |
* | Simplifications to proof | Yann Herklotz | 2020-05-05 | 3 | -18/+15 |
* | Finish manual simulation | Yann Herklotz | 2020-05-05 | 2 | -5/+68 |
* | Add equality check for value | Yann Herklotz | 2020-05-04 | 7 | -21/+27 |
* | Move Verilog to .sv | Yann Herklotz | 2020-05-04 | 1 | -3/+1 |
* | Refine the semantics | Yann Herklotz | 2020-05-04 | 3 | -56/+130 |
* | Add code to debug execution of HLS | Yann Herklotz | 2020-05-03 | 3 | -0/+137 |
* | Add proofs and specification of Verilog conversion | Yann Herklotz | 2020-05-03 | 2 | -0/+158 |
* | Add state transition conversion functions | Yann Herklotz | 2020-05-03 | 1 | -2/+14 |
* | Add hex notation to values | Yann Herklotz | 2020-05-03 | 1 | -0/+9 |
* | Change to State | Yann Herklotz | 2020-05-03 | 1 | -21/+22 |
* | Add documentation and conform to specification | Yann Herklotz | 2020-04-29 | 1 | -24/+41 |
* | Add CompCert semantics for Verilog | Yann Herklotz | 2020-04-24 | 1 | -81/+152 |
* | Add valueToInt function | Yann Herklotz | 2020-04-24 | 1 | -0/+3 |
* | Add OS detection to makefile | Yann Herklotz | 2020-04-23 | 2 | -16/+13 |
* | Add stmnt_runp inductive | Yann Herklotz | 2020-04-22 | 1 | -27/+106 |
* | Improve the printing of results | Yann Herklotz | 2020-04-22 | 1 | -4/+5 |
* | Return the actual result of the module | Yann Herklotz | 2020-04-22 | 1 | -2/+5 |
* | Remove unnecessary Lemma | Yann Herklotz | 2020-04-22 | 1 | -8/+1 |
* | Use State in semantics instead of splitting it up | Yann Herklotz | 2020-04-22 | 1 | -95/+98 |
* | Improve printing of results | Yann Herklotz | 2020-04-22 | 2 | -7/+13 |
* | Merge branch 'master' into develop | Yann Herklotz | 2020-04-19 | 1 | -0/+24 |
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| * | Add travis url | Yann Herklotz | 2020-04-17 | 1 | -1/+1 |
| * | Fix examples for current version of coqup | Yann Herklotz | 2020-04-17 | 1 | -3/+3 |
| * | Add information about downloading compcert | Yann Herklotz | 2020-04-17 | 1 | -0/+14 |
| * | Add examples on how to run HLS tool | Yann Herklotz | 2020-04-17 | 1 | -0/+10 |
| * | [#1 #2] Update README for installation | Yann Herklotz | 2020-04-17 | 1 | -8/+14 |
* | | Add travis url | Yann Herklotz | 2020-04-17 | 1 | -1/+1 |
* | | Fix Verilog.v | Yann Herklotz | 2020-04-17 | 1 | -1/+1 |