| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Add pretty printing for Verilog integrated with CompCert | Yann Herklotz | 2020-02-17 | 1 | -234/+0 |
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| * | Improve the Coq sources and add extraction | Yann Herklotz | 2020-02-13 | 1 | -43/+19 |
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| * | Add nix file | Yann Herklotz | 2020-02-04 | 1 | -2/+13 |
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| * | Short proof and add Tactics | Yann Herklotz | 2020-01-29 | 1 | -12/+15 |
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| * | Proof of nat_to_value_is_flat added | Yann Herklotz | 2020-01-29 | 1 | -29/+28 |
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| * | Trying some more proofs | Yann Herklotz | 2020-01-24 | 1 | -7/+50 |
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| * | Added value_to_nat | Yann Herklotz | 2020-01-24 | 1 | -11/+19 |
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| * | Reorder to let it compile again | Yann Herklotz | 2020-01-24 | 1 | -37/+35 |
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| * | Finish some proofs and convert to nat | Yann Herklotz | 2020-01-24 | 1 | -12/+16 |
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| * | Add some proofs about values | Yann Herklotz | 2020-01-23 | 1 | -94/+181 |
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| * | Move into src directory | Yann Herklotz | 2020-01-22 | 1 | -0/+105 |
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index : vericert | |
| Vericert is a formally verified high-level synthesis tool. |
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