| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Eliminate memory bounds assumption! | James Pollard | 2020-06-29 | 1 | -2/+2 |
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| * | Finish first IStore proof (modulo some admissions). | James Pollard | 2020-06-28 | 1 | -12/+12 |
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| * | Fix unsigned/signed issues. | James Pollard | 2020-06-28 | 1 | -13/+15 |
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| * | Work on proof. | James Pollard | 2020-06-28 | 1 | -0/+50 |
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| * | Finish ILoad proof with some assumptions: | James Pollard | 2020-06-24 | 1 | -184/+163 |
| | | | | | | | * EXPR_OK: Yann to work on this. * READ_BOUNDS: To axiomise (or find a better solution). * 32-bit range of register values. | ||||
| * | Normalise entire expression to avoid overflow issues. | James Pollard | 2020-06-23 | 1 | -0/+235 |
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index : vericert | |
| Vericert is a formally verified high-level synthesis tool. |
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