| Commit message (Collapse) | Author | Age | Files | Lines | |
|---|---|---|---|---|---|
| * | Move list lemmas to own file | Michalis Pardalos | 2021-08-22 | 1 | -0/+27 |
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| * | Complete HTLspec (mostly) | Michalis Pardalos | 2021-08-12 | 1 | -1/+3 |
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| * | Remove all Admitted from top-level Compiler.v | Michalis Pardalos | 2021-06-10 | 1 | -7/+10 |
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| * | Move HTL renaming pass to own file | Michalis Pardalos | 2021-06-06 | 1 | -1/+17 |
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| * | Get entire HTLgenspec proof passing | Michalis Pardalos | 2021-05-10 | 1 | -0/+10 |
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| * | Progress on tr_module proof | Michalis Pardalos | 2021-05-08 | 1 | -0/+2 |
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| * | Fully clean up the iter_expand_instr_spec proof | Michalis Pardalos | 2021-05-07 | 1 | -0/+13 |
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| * | Prove a spec for the mapping of function params | Michalis Pardalos | 2021-05-06 | 1 | -6/+5 |
| | | | | | | Extracted the traversal of call args into a function and gave it a spec, so that it can be used to prove the overall spec for the Icall instruction. | ||||
| * | Solve iter_expand_instr_spec by tactic (not Icall) | Michalis Pardalos | 2021-05-05 | 1 | -2/+3 |
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| * | Add lemmas relating to new HTLgen operations | Michalis Pardalos | 2021-05-03 | 1 | -2/+2 |
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| * | Add externctrl props to HTLgen's st_prop | Michalis Pardalos | 2021-05-03 | 1 | -0/+7 |
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| * | Simplify some HTLgenspec proofs | Michalis Pardalos | 2021-05-02 | 1 | -0/+5 |
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| * | Handle declarations of externctrl regs in Verilog | Michalis Pardalos | 2021-05-01 | 1 | -0/+7 |
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| * | [WIP] Generate calling verilog in RTL->HTL | Michalis Pardalos | 2021-04-18 | 1 | -0/+8 |
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| * | Merge branch 'master' into michalis-merge | Yann Herklotz | 2021-02-16 | 1 | -1/+0 |
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| | * | Remove dependency on Tactics | Yann Herklotz | 2021-02-16 | 1 | -1/+0 |
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| * | | Merge branch 'michalis' of https://github.com/mpardalos/vericert into ↵ | Yann Herklotz | 2021-02-16 | 3 | -4/+71 |
| |\ \ | |/ |/| | | | michalis-merge | ||||
| | * | Add PTree traversal functions for vericert monads | Michalis Pardalos | 2021-02-15 | 1 | -1/+20 |
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| | * | Add an indexed filter function to PTree | Michalis Pardalos | 2021-02-12 | 1 | -0/+27 |
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| | * | Inlined modules are valid verilog, use correct clk | Michalis Pardalos | 2021-01-26 | 1 | -0/+9 |
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| | * | Implement renumbering (wrong) | Michalis Pardalos | 2021-01-25 | 1 | -3/+14 |
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| * | | Add destruction to context match expressions | Yann Herklotz | 2021-01-26 | 1 | -2/+5 |
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| * | | Fix imports in Coq modules | Yann Herklotz | 2021-01-21 | 3 | -26/+35 |
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| * | | Add correct copyright notices in files | Yann Herklotz | 2021-01-10 | 5 | -0/+93 |
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| * | | Fix build for Coq 8.12.1 | Yann Herklotz | 2020-11-26 | 2 | -7/+249 |
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| * | | Update definition of Vneg | Yann Herklotz | 2020-11-07 | 1 | -1/+1 |
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| * | | Finish implementation of shrx_shrx_alt_equiv | Yann Herklotz | 2020-11-05 | 1 | -74/+133 |
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| * | | Proven with some assumptions | Yann Herklotz | 2020-11-04 | 1 | -4/+20 |
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| * | | Continue to prove signed_neg | Yann Herklotz | 2020-11-04 | 1 | -1/+44 |
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| * | | Add to Oshrximm proof | Yann Herklotz | 2020-11-03 | 1 | -55/+109 |
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| * | | Add intextra | Yann Herklotz | 2020-11-03 | 1 | -0/+115 |
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| * | Rename to Vericertlib | Yann Herklotz | 2020-07-17 | 1 | -0/+0 |
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| * | Change name to Vericert | Yann Herklotz | 2020-07-14 | 5 | -6/+6 |
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| * | Merge remote-tracking branch 'james/develop' into develop | Yann Herklotz | 2020-07-04 | 1 | -10/+42 |
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| | * | Working on determinacy proof. | James Pollard | 2020-07-04 | 1 | -10/+42 |
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| * | | Define ofbytes | Yann Herklotz | 2020-07-04 | 1 | -1/+72 |
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| * | Switch to uvalueToZ in lessdef. | James Pollard | 2020-07-02 | 2 | -29/+54 |
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| * | Remove all <> Admitted | Yann Herklotz | 2020-07-02 | 1 | -0/+15 |
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| * | Improve (?) automation. | James Pollard | 2020-07-01 | 2 | -15/+37 |
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| * | Heavy automation of proofs. | James Pollard | 2020-06-30 | 1 | -1/+8 |
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| * | Eliminate memory bounds assumption! | James Pollard | 2020-06-29 | 1 | -2/+2 |
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| * | Add missing file. | James Pollard | 2020-06-29 | 1 | -0/+34 |
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| * | Finish first IStore proof (modulo some admissions). | James Pollard | 2020-06-28 | 1 | -12/+12 |
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| * | Fix unsigned/signed issues. | James Pollard | 2020-06-28 | 2 | -21/+30 |
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| * | Work on proof. | James Pollard | 2020-06-28 | 2 | -0/+53 |
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| * | Finish ILoad proof with some assumptions: | James Pollard | 2020-06-24 | 1 | -184/+163 |
| | | | | | | | * EXPR_OK: Yann to work on this. * READ_BOUNDS: To axiomise (or find a better solution). * 32-bit range of register values. | ||||
| * | Normalise entire expression to avoid overflow issues. | James Pollard | 2020-06-23 | 2 | -0/+245 |
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| * | Tidy up proof for Aindexed2scaled. | James Pollard | 2020-06-22 | 1 | -1/+54 |
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| * | Some (very) useful lemmas about arrays. | James Pollard | 2020-06-17 | 1 | -0/+2 |
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| * | Fix array semantics merge granularity. | James Pollard | 2020-06-17 | 1 | -0/+7 |
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index : vericert | |
| Vericert is a formally verified high-level synthesis tool. |
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