| Commit message (Collapse) | Author | Age | Files | Lines | |
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| * | Address ram in renaming pass | Michalis Pardalos | 2021-09-02 | 1 | -5/+14 |
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| * | Use sumbool instead of option for decide_ram_wf | Michalis Pardalos | 2021-09-01 | 1 | -6/+6 |
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| * | Get Renaming compiling with RAM inference | Michalis Pardalos | 2021-08-31 | 1 | -0/+14 |
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| * | WIP | Michalis Pardalos | 2021-08-30 | 1 | -3/+13 |
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| * | Merge branch 'oopsla21' into sharing-merge | Michalis Pardalos | 2021-08-26 | 1 | -4/+178 |
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| | * | Basically done with proof | Yann Herklotz | 2021-04-07 | 1 | -0/+14 |
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| | * | Finish load and store proof, but broke top-level | Yann Herklotz | 2021-04-06 | 1 | -4/+105 |
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| | * | Finish store proof without admit | Yann Herklotz | 2021-04-04 | 1 | -2/+7 |
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| | * | Add new enable interface | Yann Herklotz | 2021-04-01 | 1 | -13/+15 |
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| | * | Add memory disable | Yann Herklotz | 2021-03-31 | 1 | -2/+3 |
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| | * | Add many lemmas about arrays | Yann Herklotz | 2021-03-21 | 1 | -17/+17 |
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| | * | Prove idempotency of array merge | Yann Herklotz | 2021-03-11 | 1 | -4/+8 |
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| | * | Update RAM generation proofs | Yann Herklotz | 2021-03-09 | 1 | -4/+12 |
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| | * | Add RAM semantics to HTL and fix proof | Yann Herklotz | 2021-03-03 | 1 | -3/+40 |
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| | * | Add RAM to HTL | Yann Herklotz | 2021-03-02 | 1 | -0/+1 |
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| * | | Find called module in Icall proof | Michalis Pardalos | 2021-08-19 | 1 | -8/+4 |
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| * | | Make externctrl application its own HTL pass | Michalis Pardalos | 2021-06-06 | 1 | -11/+20 |
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| * | | Move HTL renaming pass to own file | Michalis Pardalos | 2021-06-06 | 1 | -0/+12 |
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| * | | Add module idents to the semantics | Michalis Pardalos | 2021-05-17 | 1 | -30/+43 |
| | | | | | | | | | Necessary because they are used as pointers in externctrl | ||||
| * | | Give new semantics for HTL | Michalis Pardalos | 2021-05-13 | 1 | -15/+41 |
| | | | | | | | | | There is still some questions about the use of module identifiers in the semantics. | ||||
| * | | Remove "active_call" from HTL semantics | Michalis Pardalos | 2021-05-13 | 1 | -12/+8 |
| | | | | | | | | | | | added previously to support the fork/wait/join HTL instructions which have since been removed | ||||
| * | | Tie all modules' clock to main | Michalis Pardalos | 2021-04-30 | 1 | -0/+1 |
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| * | | [WIP] Re-implement translation of calls. | Michalis Pardalos | 2021-04-19 | 1 | -0/+17 |
| | | | | | | | | | | | Add an explicit map of local HTL registers to control signals and params of other modules, used to implement calls. | ||||
| * | | [WIP] Remove extra statements from HTL. | Michalis Pardalos | 2021-04-18 | 1 | -56/+4 |
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| * | | [WIP] Add semantics for new HTL instructions | Michalis Pardalos | 2021-04-02 | 1 | -38/+72 |
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| * | | Merge branch 'michalis' of https://github.com/mpardalos/vericert into ↵ | Yann Herklotz | 2021-02-16 | 1 | -4/+36 |
| |/ | | | | michalis-merge | ||||
| * | Fix imports to remove warnings when compiling | Yann Herklotz | 2021-01-22 | 1 | -5/+14 |
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| * | Add correct copyright notices in files | Yann Herklotz | 2021-01-10 | 1 | -0/+1 |
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| * | Add RTLBlock intermediate language | Yann Herklotz | 2020-08-30 | 1 | -0/+171 |
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index : vericert | |
| Vericert is a formally verified high-level synthesis tool. |
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