aboutsummaryrefslogtreecommitdiffstats
path: root/src/verilog
Commit message (Expand)AuthorAgeFilesLines
* Update compilationYann Herklotz2020-04-013-14/+81
* Add documentation and fix makefile for CompcertYann Herklotz2020-03-312-1/+26
* Add more operators and print themYann Herklotz2020-03-312-4/+15
* Improve Verilog error messagesYann Herklotz2020-03-311-1/+4
* Fix Verilog printingYann Herklotz2020-03-312-33/+35
* Change Verilog AST back to more traditional ASTYann Herklotz2020-03-291-30/+44
* Remove unnecessary examples from HTLYann Herklotz2020-03-291-4/+4
* Update AST and value representationsYann Herklotz2020-03-291-213/+42
* Rename Verilog AST filesYann Herklotz2020-03-293-0/+0
* Update printingYann Herklotz2020-03-253-38/+52
* Remove dunes and make the build recursiveYann Herklotz2020-03-251-4/+0
* Rename to HTLYann Herklotz2020-03-231-18/+28
* Create intermediate VTL languageYann Herklotz2020-03-221-0/+63
* Add compcert library to coquplibYann Herklotz2020-03-221-8/+9
* Lower case foldersYann Herklotz2020-03-194-0/+341