Commit message (Collapse) | Author | Age | Files | Lines | |
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* | Add equality check for value | Yann Herklotz | 2020-05-04 | 7 | -21/+27 |
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* | Refine the semantics | Yann Herklotz | 2020-05-04 | 3 | -56/+130 |
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* | Add code to debug execution of HLS | Yann Herklotz | 2020-05-03 | 1 | -0/+73 |
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* | Add proofs and specification of Verilog conversion | Yann Herklotz | 2020-05-03 | 2 | -0/+158 |
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* | Add state transition conversion functions | Yann Herklotz | 2020-05-03 | 1 | -2/+14 |
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* | Add hex notation to values | Yann Herklotz | 2020-05-03 | 1 | -0/+9 |
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* | Change to State | Yann Herklotz | 2020-05-03 | 1 | -21/+22 |
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* | Add documentation and conform to specification | Yann Herklotz | 2020-04-29 | 1 | -24/+41 |
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* | Add CompCert semantics for Verilog | Yann Herklotz | 2020-04-24 | 1 | -81/+152 |
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* | Add valueToInt function | Yann Herklotz | 2020-04-24 | 1 | -0/+3 |
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* | Add stmnt_runp inductive | Yann Herklotz | 2020-04-22 | 1 | -27/+106 |
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* | Return the actual result of the module | Yann Herklotz | 2020-04-22 | 1 | -2/+5 |
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* | Remove unnecessary Lemma | Yann Herklotz | 2020-04-22 | 1 | -8/+1 |
| | | | | | Still cannot run these functions inside Coq itself, however, they work when they are extracted to Caml. | ||||
* | Use State in semantics instead of splitting it up | Yann Herklotz | 2020-04-22 | 1 | -95/+98 |
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* | Improve printing of results | Yann Herklotz | 2020-04-22 | 2 | -7/+13 |
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* | Fix Verilog.v | Yann Herklotz | 2020-04-17 | 1 | -1/+1 |
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* | Add main module run | Yann Herklotz | 2020-04-17 | 2 | -51/+79 |
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* | Fix printing with new Verilog AST | Yann Herklotz | 2020-04-17 | 2 | -26/+54 |
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* | Only generate clocked always blocks | Yann Herklotz | 2020-04-17 | 1 | -13/+13 |
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* | Extract simulator | Yann Herklotz | 2020-04-17 | 2 | -5/+5 |
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* | Add Simulator.v | Yann Herklotz | 2020-04-17 | 1 | -0/+32 |
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* | Add do notation for option | Yann Herklotz | 2020-04-15 | 1 | -0/+11 |
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* | Make proofs simpler using auto | Yann Herklotz | 2020-04-15 | 1 | -59/+45 |
| | | | | | This makes changes to theorems easier, as the proofs will likely not have to be fixed. The runtime is also not much slower. | ||||
* | Add Verilog semantics with new Verilog module | Yann Herklotz | 2020-04-15 | 1 | -33/+326 |
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* | Create Value module for bitvectors | Yann Herklotz | 2020-04-15 | 1 | -0/+217 |
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* | Add proof about state wf | Yann Herklotz | 2020-04-08 | 1 | -40/+193 |
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* | Add partial proof of well formed state | Yann Herklotz | 2020-04-06 | 1 | -24/+136 |
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* | Fix extraction on linux | Yann Herklotz | 2020-04-02 | 1 | -1/+1 |
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* | Handle loops and conditionals correctly | Yann Herklotz | 2020-04-02 | 3 | -112/+181 |
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* | Complete translation from simple RTL to Verilog | Yann Herklotz | 2020-04-01 | 1 | -101/+162 |
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* | Update compilation | Yann Herklotz | 2020-04-01 | 5 | -17/+84 |
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* | Convert from RTL to Verilog directly | Yann Herklotz | 2020-03-31 | 3 | -21/+45 |
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* | Add documentation and fix makefile for Compcert | Yann Herklotz | 2020-03-31 | 5 | -76/+101 |
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* | Add more operators and print them | Yann Herklotz | 2020-03-31 | 3 | -41/+84 |
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* | Use Compcert extraction | Yann Herklotz | 2020-03-31 | 1 | -2/+161 |
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* | Improve Verilog error messages | Yann Herklotz | 2020-03-31 | 2 | -2/+11 |
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* | Fix Verilog printing | Yann Herklotz | 2020-03-31 | 2 | -33/+35 |
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* | Add main file and global building | Yann Herklotz | 2020-03-31 | 1 | -6/+0 |
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* | Rename to transf_program | Yann Herklotz | 2020-03-29 | 1 | -1/+1 |
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* | Move compiler | Yann Herklotz | 2020-03-29 | 1 | -0/+113 |
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* | Complete conversion from HTL to Verilog | Yann Herklotz | 2020-03-29 | 1 | -8/+91 |
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* | Change Verilog AST back to more traditional AST | Yann Herklotz | 2020-03-29 | 1 | -30/+44 |
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* | Add Verilog generation from HTL | Yann Herklotz | 2020-03-29 | 1 | -0/+135 |
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* | Remove unnecessary examples from HTL | Yann Herklotz | 2020-03-29 | 2 | -10/+5 |
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* | Update AST and value representations | Yann Herklotz | 2020-03-29 | 1 | -213/+42 |
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* | Rename Verilog AST files | Yann Herklotz | 2020-03-29 | 3 | -0/+0 |
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* | Update printing | Yann Herklotz | 2020-03-25 | 4 | -38/+56 |
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* | Remove dunes and make the build recursive | Yann Herklotz | 2020-03-25 | 4 | -13/+5 |
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* | Create HTLgen | Yann Herklotz | 2020-03-25 | 3 | -148/+5 |
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* | Move driver | Yann Herklotz | 2020-03-25 | 3 | -126/+0 |
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