Commit message (Expand) | Author | Age | Files | Lines | |
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* | Progress on tr_module proof | Michalis Pardalos | 2021-05-08 | 2 | -52/+82 |
* | Fully clean up the iter_expand_instr_spec proof | Michalis Pardalos | 2021-05-07 | 2 | -146/+80 |
* | Complete iter_expand_instr_spec proof | Michalis Pardalos | 2021-05-07 | 1 | -14/+23 |
* | Prove a spec for the mapping of function params | Michalis Pardalos | 2021-05-06 | 3 | -49/+128 |
* | Solve easier branches of the transf_instr proof | Michalis Pardalos | 2021-05-06 | 1 | -29/+64 |
* | Define map_incr to clarify st_incr | Michalis Pardalos | 2021-05-05 | 1 | -9/+13 |
* | Clean up iter_expand_instr_spec proof | Michalis Pardalos | 2021-05-05 | 1 | -21/+10 |
* | Solve iter_expand_instr_spec by tactic (not Icall) | Michalis Pardalos | 2021-05-05 | 2 | -107/+182 |
* | Rewrite transf_instr, move complicated part up | Michalis Pardalos | 2021-05-03 | 1 | -6/+6 |
* | Add lemmas relating to new HTLgen operations | Michalis Pardalos | 2021-05-03 | 2 | -51/+73 |
* | Add some statements about externctrl to tr_code | Michalis Pardalos | 2021-05-03 | 1 | -9/+13 |
* | Add externctrl props to HTLgen's st_prop | Michalis Pardalos | 2021-05-03 | 2 | -41/+51 |
* | Use ltac:() instead of Program in HTLgen | Michalis Pardalos | 2021-05-03 | 1 | -140/+116 |
* | Use Defined for obligations in Program Definitions | Michalis Pardalos | 2021-05-02 | 1 | -12/+12 |
* | Give a (questionable) translation spec for HTLgen | Michalis Pardalos | 2021-05-02 | 2 | -39/+61 |
* | Simplify some HTLgenspec proofs | Michalis Pardalos | 2021-05-02 | 2 | -2/+7 |
* | Handle declarations of externctrl regs in Verilog | Michalis Pardalos | 2021-05-01 | 2 | -24/+48 |
* | Remove some dead code from Veriloggen | Michalis Pardalos | 2021-05-01 | 1 | -17/+0 |
* | Fix HTLgen using wrong register in call wait state | Michalis Pardalos | 2021-05-01 | 1 | -2/+3 |
* | Fix typo bug in applying externctrl | Michalis Pardalos | 2021-05-01 | 1 | -2/+2 |
* | Print externctrl in HTL debug output | Michalis Pardalos | 2021-05-01 | 2 | -6/+31 |
* | Apply externctrl mapping in HTL->Verilog stage | Michalis Pardalos | 2021-04-30 | 1 | -22/+147 |
* | Tie all modules' clock to main | Michalis Pardalos | 2021-04-30 | 4 | -16/+47 |
* | Fix map_externctrl double-incrementing freshreg | Michalis Pardalos | 2021-04-30 | 1 | -3/+2 |
* | Delete unused get_main_clk function from HTLgen | Michalis Pardalos | 2021-04-30 | 1 | -11/+0 |
* | Map clock correctly in RTL->HTL | Michalis Pardalos | 2021-04-29 | 1 | -15/+9 |
* | Renumber AssocMaps in HTL modules too | Michalis Pardalos | 2021-04-20 | 2 | -7/+25 |
* | Move renumbering to be HTL->HTL | Michalis Pardalos | 2021-04-20 | 4 | -237/+234 |
* | Get HTLgenproof to compile | Michalis Pardalos | 2021-04-20 | 2 | -279/+280 |
* | Update HTLPargen for new HTL | Michalis Pardalos | 2021-04-20 | 1 | -30/+25 |
* | Update ocaml code match HTL changes | Michalis Pardalos | 2021-04-20 | 1 | -25/+2 |
* | [WIP] Re-implement translation of calls. | Michalis Pardalos | 2021-04-19 | 2 | -33/+84 |
* | [WIP] Use Program instead of state_incr lemmas | Michalis Pardalos | 2021-04-18 | 1 | -165/+40 |
* | [WIP] Generate calling verilog in RTL->HTL | Michalis Pardalos | 2021-04-18 | 2 | -15/+48 |
* | [WIP] Remove extra statements from HTL. | Michalis Pardalos | 2021-04-18 | 2 | -73/+18 |
* | [WIP] HTLgenspec proof | Michalis Pardalos | 2021-04-17 | 1 | -46/+34 |
* | Fix up rest of HTLgenproof | Michalis Pardalos | 2021-04-09 | 1 | -62/+46 |
* | Fix merge error in oshrximm | Michalis Pardalos | 2021-04-09 | 1 | -1/+3 |
* | Get HTLgenproof to compile | Michalis Pardalos | 2021-04-08 | 1 | -87/+89 |
* | [WIP] Add semantics for new HTL instructions | Michalis Pardalos | 2021-04-02 | 1 | -38/+72 |
* | Merge remote-tracking branch 'upstream/master' into dev-michalis | Michalis Pardalos | 2021-03-29 | 9 | -262/+560 |
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| * | Fix printing of the final cycle count | Yann Herklotz | 2021-02-21 | 1 | -2/+15 |
| * | Fix bug in schedule | Yann Herklotz | 2021-02-19 | 1 | -2/+1 |
| * | Fix schedule for now | Yann Herklotz | 2021-02-18 | 1 | -1/+2 |
| * | Add udiv and sdiv to constraints | Yann Herklotz | 2021-02-17 | 1 | -12/+20 |
| * | Remove dead code and add more constraints | Yann Herklotz | 2021-02-17 | 1 | -107/+16 |
| * | Add option to turn off if-conversion | Yann Herklotz | 2021-02-16 | 5 | -4/+29 |
| * | Merge branch 'master' into develop | Yann Herklotz | 2021-02-16 | 3 | -1/+621 |
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| * | | Use topological sort for now | Yann Herklotz | 2021-02-16 | 1 | -4/+9 |
| * | | Add schedule for new RTLPar type | Yann Herklotz | 2021-02-16 | 1 | -29/+42 |