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| author | Yann Herklotz <git@yannherklotz.com> | 2019-05-26 16:25:40 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-05-26 16:26:02 +0100 |
| commit | 87b0f99853072ad1b17b380726b3807f6f4f91d4 (patch) | |
| tree | 3ee3d95eb9603d4542173d80ed0c45c6adc492f3 | |
| parent | 11bd73faa516cde0af74e5359c36c8f1fa4e816a (diff) | |
| download | verismith-87b0f99853072ad1b17b380726b3807f6f4f91d4.tar.gz verismith-87b0f99853072ad1b17b380726b3807f6f4f91d4.zip | |
Add changes to work with older Vivado
| -rw-r--r-- | experiments/vivado_all.toml | 2 | ||||
| -rwxr-xr-x | scripts/run | 4 | ||||
| -rwxr-xr-x | scripts/swarm | 4 | ||||
| -rw-r--r-- | src/VeriFuzz/Sim/Vivado.hs | 2 |
4 files changed, 6 insertions, 6 deletions
diff --git a/experiments/vivado_all.toml b/experiments/vivado_all.toml index 50c5e7b..5e575ec 100644 --- a/experiments/vivado_all.toml +++ b/experiments/vivado_all.toml @@ -22,7 +22,7 @@ module.depth = 2 module.max = 5 size = 20 - statement.depth = 7 + statement.depth = 5 sample.method = "hat" sample.size = 10 diff --git a/scripts/run b/scripts/run index f6683cb..311721a 100755 --- a/scripts/run +++ b/scripts/run @@ -4,8 +4,8 @@ import subprocess def main(): i = 0 - name = "output_yosys_all" - config = "experiments/yosys_all.toml" + name = "output_vivado_all" + config = "experiments/vivado_all.toml" iterations = 50 while True: subprocess.call(["verifuzz", "fuzz", "-o", name + str(i), "-c", config, "-n", str(iterations)]) diff --git a/scripts/swarm b/scripts/swarm index 526fb30..b489f00 100755 --- a/scripts/swarm +++ b/scripts/swarm @@ -4,8 +4,8 @@ import subprocess def main(): i = 0 - name = "output_large_rand" - config = "experiments/config_large.toml" + name = "output_swarm_medium2_rand" + config = "experiments/config_medium.toml" iterations = 20 while True: subprocess.call(["verifuzz", "config", "-c", config, "-o", "config_random.toml", "--randomise"]) diff --git a/src/VeriFuzz/Sim/Vivado.hs b/src/VeriFuzz/Sim/Vivado.hs index 9f48188..90eed2d 100644 --- a/src/VeriFuzz/Sim/Vivado.hs +++ b/src/VeriFuzz/Sim/Vivado.hs @@ -56,7 +56,7 @@ runSynthVivado sim (SourceInfo top src) = do writefile vivadoTcl . vivadoSynthConfig top . toTextIgnore $ synthOutput sim writefile "rtl.v" $ genSource src - run_ "sed" ["s/^module/(* use_dsp=\"no\" *) module/;", "-i", "rtl.v"] + run_ "sed" ["s/^module/(* use_dsp48=\"no\" *) (* use_dsp=\"no\" *) module/;", "-i", "rtl.v"] let exec_ n = execute_ SynthFail dir |