aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorYann Herklotz Grave <git@yannherklotzgrave.com>2019-02-15 13:34:11 +0000
committerYann Herklotz Grave <git@yannherklotzgrave.com>2019-02-15 13:34:11 +0000
commitfbb7be7702cdf6f74a04b68525069042a899c9b5 (patch)
treea1deba3135ec6f7a74305c14c920eef9de78fb4c
parent0d1d5c2c9ebb9f658c401610551242b835144eb1 (diff)
downloadverismith-fbb7be7702cdf6f74a04b68525069042a899c9b5.tar.gz
verismith-fbb7be7702cdf6f74a04b68525069042a899c9b5.zip
Fix all warnings
-rw-r--r--app/Main.hs1
-rw-r--r--src/VeriFuzz.hs8
-rw-r--r--src/VeriFuzz/AST.hs5
-rw-r--r--src/VeriFuzz/CodeGen.hs3
4 files changed, 9 insertions, 8 deletions
diff --git a/app/Main.hs b/app/Main.hs
index 4ac0ab4..79ea7a0 100644
--- a/app/Main.hs
+++ b/app/Main.hs
@@ -3,7 +3,6 @@ module Main where
import Control.Concurrent
import Data.Text (Text)
import qualified Data.Text as T
-import qualified Data.Text.IO as T
import Options.Applicative
import qualified Shelly as S
import qualified Test.QuickCheck as QC
diff --git a/src/VeriFuzz.hs b/src/VeriFuzz.hs
index 5f5d68a..16d96ce 100644
--- a/src/VeriFuzz.hs
+++ b/src/VeriFuzz.hs
@@ -11,6 +11,7 @@ Portability : POSIX
module VeriFuzz
( runEquivalence
, runSimulation
+ , draw
, module VeriFuzz.AST
, module VeriFuzz.ASTGen
, module VeriFuzz.Circuit
@@ -26,7 +27,6 @@ module VeriFuzz
, module VeriFuzz.Yosys
) where
-import Control.Lens
import qualified Crypto.Random.DRBG as C
import Data.ByteString (ByteString)
import Data.ByteString.Builder (byteStringHex, toLazyByteString)
@@ -77,12 +77,12 @@ showBS = decodeUtf8 . L.toStrict . toLazyByteString . byteStringHex
runSimulation :: IO ()
runSimulation = do
- gr <- QC.generate $ rDups <$> QC.resize 100 (randomDAG :: QC.Gen (G.Gr Gate ()))
+ -- gr <- QC.generate $ rDups <$> QC.resize 100 (randomDAG :: QC.Gen (G.Gr Gate ()))
-- let dot = G.showDot . G.fglToDotString $ G.nemap show (const "") gr
-- writeFile "file.dot" dot
-- shelly $ run_ "dot" ["-Tpng", "-o", "file.png", "file.dot"]
- let circ =
- head $ (nestUpTo 30 . generateAST $ Circuit gr) ^.. getVerilogSrc . traverse . getDescription
+ -- let circ =
+ -- head $ (nestUpTo 30 . generateAST $ Circuit gr) ^.. getVerilogSrc . traverse . getDescription
rand <- genRandom 20
rand2 <- QC.generate (randomMod 10 100)
val <- shelly $ runSim defaultIcarus (rand2) rand
diff --git a/src/VeriFuzz/AST.hs b/src/VeriFuzz/AST.hs
index 0f71264..fe76042 100644
--- a/src/VeriFuzz/AST.hs
+++ b/src/VeriFuzz/AST.hs
@@ -237,6 +237,7 @@ instance QC.Arbitrary UnaryOperator where
[ UnPlus
, UnMinus
, UnNot
+ , UnLNot
, UnAnd
, UnNand
, UnOr
@@ -347,8 +348,8 @@ instance QC.Arbitrary Expr where
traverseExpr :: (Applicative f) => (Expr -> f Expr) -> Expr -> f Expr
traverseExpr f (Concat e ) = Concat <$> sequenceA (f <$> e)
-traverseExpr f (UnOp un e ) = UnOp un <$> f e
-traverseExpr f (BinOp l op r) = BinOp <$> f l <*> pure op <*> f r
+traverseExpr f (UnOp u e ) = UnOp u <$> f e
+traverseExpr f (BinOp l o r) = BinOp <$> f l <*> pure o <*> f r
traverseExpr f (Cond c l r) = Cond <$> f c <*> f l <*> f r
traverseExpr f (Func fn e ) = Func fn <$> f e
traverseExpr _ e = pure e
diff --git a/src/VeriFuzz/CodeGen.hs b/src/VeriFuzz/CodeGen.hs
index 54240cb..ea3159d 100644
--- a/src/VeriFuzz/CodeGen.hs
+++ b/src/VeriFuzz/CodeGen.hs
@@ -155,7 +155,8 @@ genBinaryOperator BinASR = " >>> "
genUnaryOperator :: UnaryOperator -> Text
genUnaryOperator UnPlus = "+"
genUnaryOperator UnMinus = "-"
-genUnaryOperator UnNot = "!"
+genUnaryOperator UnLNot = "!"
+genUnaryOperator UnNot = "~"
genUnaryOperator UnAnd = "&"
genUnaryOperator UnNand = "~&"
genUnaryOperator UnOr = "|"