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author | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-20 17:45:32 +0000 |
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committer | Yann Herklotz <ymherklotz@gmail.com> | 2019-01-20 17:45:32 +0000 |
commit | 22182aebc734832f64d324f1635b7e9a45bd4d21 (patch) | |
tree | 3fc58baeda3f87880b57ac38e3d3cbaed31beb32 | |
parent | d60fc9c882f6ce668123fbfbfd9a0f02dd832f7b (diff) | |
download | verismith-22182aebc734832f64d324f1635b7e9a45bd4d21.tar.gz verismith-22182aebc734832f64d324f1635b7e9a45bd4d21.zip |
Format of main file
-rw-r--r-- | app/Main.hs | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/app/Main.hs b/app/Main.hs index aeda625..b651a68 100644 --- a/app/Main.hs +++ b/app/Main.hs @@ -43,10 +43,12 @@ runEquivalence t = do ^.. getVerilogSrc . traverse . getDescription - shelly . chdir_p (fromText "equiv" </> fromText t) . verbosely $ runEquiv defaultYosys - defaultYosys - (Just defaultXst) - circ + shelly . verbosely $ do + mkdir_p (fromText "equiv" </> fromText t) + curr <- toTextIgnore <$> pwd + setenv "VERIFUZZ_ROOT" curr + cd (fromText "equiv" </> fromText t) + runEquiv defaultYosys defaultYosys (Just defaultXst) circ main :: IO () --main = sample (arbitrary :: Gen (Circuit Input)) |