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| author | Yann Herklotz <git@yannherklotz.com> | 2020-01-01 21:34:01 +0100 |
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| committer | Yann Herklotz <git@yannherklotz.com> | 2020-01-01 21:34:01 +0100 |
| commit | f5380d9f6fe5b13441be394d4401683022ea72dc (patch) | |
| tree | 26a52ef5f1fdd7a12ff2f6e512f6c2bfe9a455d7 /experiments/instructions.org | |
| parent | ff8f80651015556aa8f2d49a8fcbceccb7a5be8e (diff) | |
| download | verismith-f5380d9f6fe5b13441be394d4401683022ea72dc.tar.gz verismith-f5380d9f6fe5b13441be394d4401683022ea72dc.zip | |
Fix to the instructions
Diffstat (limited to 'experiments/instructions.org')
| -rw-r--r-- | experiments/instructions.org | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/experiments/instructions.org b/experiments/instructions.org index 9bc2ea4..e125fd5 100644 --- a/experiments/instructions.org +++ b/experiments/instructions.org @@ -243,7 +243,7 @@ The result should be that the equivalence check fails and a reduced testcase sho Contrary to what is expected, the simulation runs will pass. This is because the bug occurs in the initial values that are assigned to the variables. These are set to 0 in the design, but mistakenly set to x in the synthesised design. The testbench does not check for those values and the error is therefore not found by the testbench. -To fix this manually, one can add a ~$strobe("%b", y);~ on line 22 in +To fix this manually, one can add a ~$strobe("%b", y);~ on line 22 in the yosys testbench: #+begin_src bash cd output_ms/fuzz_1/simulation_yosys |