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| author | Yann Herklotz <ymherklotz@gmail.com> | 2018-12-31 12:44:42 +0100 |
|---|---|---|
| committer | Yann Herklotz <ymherklotz@gmail.com> | 2018-12-31 12:44:42 +0100 |
| commit | 619965e928c10caf6fe430cf09c9bc09352ba071 (patch) | |
| tree | 15598c0ab48ee70ce7cbabca1d0b2411d8eb341d /src/Test/VeriFuzz/Verilog/Helpers.hs | |
| parent | 380b91b8ec012e75d0acffa2635e77afe887d461 (diff) | |
| download | verismith-619965e928c10caf6fe430cf09c9bc09352ba071.tar.gz verismith-619965e928c10caf6fe430cf09c9bc09352ba071.zip | |
Add direction to Decl and add doctest
Diffstat (limited to 'src/Test/VeriFuzz/Verilog/Helpers.hs')
| -rw-r--r-- | src/Test/VeriFuzz/Verilog/Helpers.hs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/Test/VeriFuzz/Verilog/Helpers.hs b/src/Test/VeriFuzz/Verilog/Helpers.hs index 6712d32..d3bc689 100644 --- a/src/Test/VeriFuzz/Verilog/Helpers.hs +++ b/src/Test/VeriFuzz/Verilog/Helpers.hs @@ -18,10 +18,10 @@ import qualified Data.Text import Test.VeriFuzz.Verilog.AST regDecl :: Identifier -> ModItem -regDecl = Decl . Port (Reg False) 1 +regDecl = Decl Nothing . Port (Reg False) 1 wireDecl :: Identifier -> ModItem -wireDecl = Decl . Port (PortNet Wire) 1 +wireDecl = Decl Nothing . Port (PortNet Wire) 1 modConn :: Text -> ModConn modConn = ModConn . PrimExpr . PrimId . Identifier |