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author | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-16 14:43:47 +0000 |
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committer | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-16 14:43:47 +0000 |
commit | a180c89947f8e0c191ba7e7dba4c6eb7edf538e6 (patch) | |
tree | e208bfc464e926bcdcccc614a0c27324b1bede26 /src/VeriFuzz.hs | |
parent | 5cee65b1d5e56573204217a800ad04d7209313dd (diff) | |
download | verismith-a180c89947f8e0c191ba7e7dba4c6eb7edf538e6.tar.gz verismith-a180c89947f8e0c191ba7e7dba4c6eb7edf538e6.zip |
Fix lint errors
Diffstat (limited to 'src/VeriFuzz.hs')
-rw-r--r-- | src/VeriFuzz.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz.hs b/src/VeriFuzz.hs index 21acf10..d583610 100644 --- a/src/VeriFuzz.hs +++ b/src/VeriFuzz.hs @@ -87,7 +87,7 @@ runSimulation = do -- head $ (nestUpTo 30 . generateAST $ Circuit gr) ^.. getVerilogSrc . traverse . getDescription rand <- genRandom 20 rand2 <- QC.generate (randomMod 10 100) - val <- shelly $ runSim defaultIcarus (rand2) rand + val <- shelly $ runSim defaultIcarus rand2 rand T.putStrLn $ showBS val onFailure :: Text -> RunFailed -> Sh () |