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authorYann Herklotz <git@ymhg.org>2019-04-07 20:16:02 +0100
committerYann Herklotz <git@ymhg.org>2019-04-07 20:16:02 +0100
commit7f32d8e4edd315ab4039432ca5b35c7eaa94f9ba (patch)
tree72ee33929209b42de6aad4a4e9e3a60962438a66 /src/VeriFuzz/Circuit/Base.hs
parent4b5401ef3400413be0559dfa17718611822fc4c6 (diff)
downloadverismith-7f32d8e4edd315ab4039432ca5b35c7eaa94f9ba.tar.gz
verismith-7f32d8e4edd315ab4039432ca5b35c7eaa94f9ba.zip
Add partial documentation
Diffstat (limited to 'src/VeriFuzz/Circuit/Base.hs')
-rw-r--r--src/VeriFuzz/Circuit/Base.hs2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/VeriFuzz/Circuit/Base.hs b/src/VeriFuzz/Circuit/Base.hs
index 6b9f725..ed63105 100644
--- a/src/VeriFuzz/Circuit/Base.hs
+++ b/src/VeriFuzz/Circuit/Base.hs
@@ -30,8 +30,10 @@ data Gate = And
-- | Newtype for the Circuit which implements a Graph from fgl.
newtype Circuit = Circuit { getCircuit :: Gr Gate () }
+-- | Newtype for a node in the circuit, which is an 'LNode Gate'.
newtype CNode = CNode { getCNode :: LNode Gate }
+-- | Newtype for a named edge which is empty, as it does not need a label.
newtype CEdge = CEdge { getCEdge :: LEdge () }
instance Random Gate where