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| author | Yann Herklotz <git@yannherklotz.com> | 2019-07-21 13:37:25 +0200 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-07-21 13:37:25 +0200 |
| commit | 30fbe26f59e54a276f88650ffa5e78343b5411eb (patch) | |
| tree | aa3166c423f262ee6296826d2c815a0b54084c31 /src/VeriFuzz/Circuit/Gen.hs | |
| parent | b5c035e45949945cc62845fa6492cffa77992524 (diff) | |
| parent | c19a51a8156bbcaee13d9819c8fe54ed0ca5c4cc (diff) | |
| download | verismith-30fbe26f59e54a276f88650ffa5e78343b5411eb.tar.gz verismith-30fbe26f59e54a276f88650ffa5e78343b5411eb.zip | |
Merge branch 'master' into fix/resize-modports
Diffstat (limited to 'src/VeriFuzz/Circuit/Gen.hs')
| -rw-r--r-- | src/VeriFuzz/Circuit/Gen.hs | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/src/VeriFuzz/Circuit/Gen.hs b/src/VeriFuzz/Circuit/Gen.hs index 0b13ece..323d8bb 100644 --- a/src/VeriFuzz/Circuit/Gen.hs +++ b/src/VeriFuzz/Circuit/Gen.hs @@ -15,9 +15,11 @@ module VeriFuzz.Circuit.Gen ) where -import Data.Graph.Inductive (LNode, Node) -import qualified Data.Graph.Inductive as G -import Data.Maybe (catMaybes) +import Data.Graph.Inductive ( LNode + , Node + ) +import qualified Data.Graph.Inductive as G +import Data.Maybe ( catMaybes ) import VeriFuzz.Circuit.Base import VeriFuzz.Circuit.Internal import VeriFuzz.Verilog.AST |