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author | Yann Herklotz <git@yannherklotz.com> | 2019-07-23 22:05:32 +0200 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2019-07-23 22:05:41 +0200 |
commit | 992e91427fccff43f8ab1944131b8f62f9328f0d (patch) | |
tree | 1108e017b2c172da02dde8d07d17f0eda7bc23f9 /src/VeriFuzz/Circuit | |
parent | 24382ce10ed53724ad2d097a7ed2397806be3e67 (diff) | |
download | verismith-992e91427fccff43f8ab1944131b8f62f9328f0d.tar.gz verismith-992e91427fccff43f8ab1944131b8f62f9328f0d.zip |
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Diffstat (limited to 'src/VeriFuzz/Circuit')
-rw-r--r-- | src/VeriFuzz/Circuit/Base.hs | 7 | ||||
-rw-r--r-- | src/VeriFuzz/Circuit/Gen.hs | 10 | ||||
-rw-r--r-- | src/VeriFuzz/Circuit/Internal.hs | 10 | ||||
-rw-r--r-- | src/VeriFuzz/Circuit/Random.hs | 17 |
4 files changed, 18 insertions, 26 deletions
diff --git a/src/VeriFuzz/Circuit/Base.hs b/src/VeriFuzz/Circuit/Base.hs index adc7d52..0bcdf39 100644 --- a/src/VeriFuzz/Circuit/Base.hs +++ b/src/VeriFuzz/Circuit/Base.hs @@ -3,7 +3,7 @@ Module : VeriFuzz.Circuit.Base Description : Base types for the circuit module. Copyright : (c) 2019, Yann Herklotz Grave License : GPL-3 -Maintainer : ymherklotz [at] gmail [dot] com +Maintainer : yann [at] yannherklotz [dot] com Stability : experimental Portability : POSIX @@ -18,10 +18,7 @@ module VeriFuzz.Circuit.Base ) where -import Data.Graph.Inductive ( Gr - , LEdge - , LNode - ) +import Data.Graph.Inductive (Gr, LEdge, LNode) import System.Random -- | The types for all the gates. diff --git a/src/VeriFuzz/Circuit/Gen.hs b/src/VeriFuzz/Circuit/Gen.hs index 323d8bb..eb7cb97 100644 --- a/src/VeriFuzz/Circuit/Gen.hs +++ b/src/VeriFuzz/Circuit/Gen.hs @@ -3,7 +3,7 @@ Module : Verilog.Circuit.Gen Description : Generate verilog from circuit. Copyright : (c) 2019, Yann Herklotz Grave License : GPL-3 -Maintainer : ymherklotz [at] gmail [dot] com +Maintainer : yann [at] yannherklotz [dot] com Stability : experimental Portability : POSIX @@ -15,11 +15,9 @@ module VeriFuzz.Circuit.Gen ) where -import Data.Graph.Inductive ( LNode - , Node - ) -import qualified Data.Graph.Inductive as G -import Data.Maybe ( catMaybes ) +import Data.Graph.Inductive (LNode, Node) +import qualified Data.Graph.Inductive as G +import Data.Maybe (catMaybes) import VeriFuzz.Circuit.Base import VeriFuzz.Circuit.Internal import VeriFuzz.Verilog.AST diff --git a/src/VeriFuzz/Circuit/Internal.hs b/src/VeriFuzz/Circuit/Internal.hs index 5220f4d..17e1586 100644 --- a/src/VeriFuzz/Circuit/Internal.hs +++ b/src/VeriFuzz/Circuit/Internal.hs @@ -3,7 +3,7 @@ Module : VeriFuzz.Circuit.Internal Description : Internal helpers for generation. Copyright : (c) 2018-2019, Yann Herklotz License : BSD-3 -Maintainer : ymherklotz [at] gmail [dot] com +Maintainer : yann [at] yannherklotz [dot] com Stability : experimental Portability : POSIX @@ -19,11 +19,9 @@ module VeriFuzz.Circuit.Internal ) where -import Data.Graph.Inductive ( Graph - , Node - ) -import qualified Data.Graph.Inductive as G -import qualified Data.Text as T +import Data.Graph.Inductive (Graph, Node) +import qualified Data.Graph.Inductive as G +import qualified Data.Text as T -- | Convert an integer into a label. -- diff --git a/src/VeriFuzz/Circuit/Random.hs b/src/VeriFuzz/Circuit/Random.hs index 2750de8..fdb5253 100644 --- a/src/VeriFuzz/Circuit/Random.hs +++ b/src/VeriFuzz/Circuit/Random.hs @@ -3,7 +3,7 @@ Module : VeriFuzz.Circuit.Random Description : Random generation for DAG Copyright : (c) 2018-2019, Yann Herklotz License : BSD-3 -Maintainer : ymherklotz [at] gmail [dot] com +Maintainer : yann [at] yannherklotz [dot] com Stability : experimental Portability : POSIX @@ -18,14 +18,13 @@ module VeriFuzz.Circuit.Random ) where -import Data.Graph.Inductive ( Context ) -import qualified Data.Graph.Inductive as G -import Data.Graph.Inductive.PatriciaTree - ( Gr ) -import Data.List ( nub ) -import Hedgehog ( Gen ) -import qualified Hedgehog.Gen as Hog -import qualified Hedgehog.Range as Hog +import Data.Graph.Inductive (Context) +import qualified Data.Graph.Inductive as G +import Data.Graph.Inductive.PatriciaTree (Gr) +import Data.List (nub) +import Hedgehog (Gen) +import qualified Hedgehog.Gen as Hog +import qualified Hedgehog.Range as Hog import VeriFuzz.Circuit.Base dupFolder :: (Eq a, Eq b) => Context a b -> [Context a b] -> [Context a b] |