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authorYann Herklotz <git@ymhg.org>2019-04-02 14:33:08 +0100
committerYann Herklotz <git@ymhg.org>2019-04-02 14:33:08 +0100
commit372bcb00204d225f4b89cfed33f99a519740dc8e (patch)
tree3148a7deb3799c6e9b069a27e4af4787375737eb /src/VeriFuzz/Gen.hs
parentbe9caab53f6d83afd7132f68697a0329548bf40d (diff)
downloadverismith-372bcb00204d225f4b89cfed33f99a519740dc8e.tar.gz
verismith-372bcb00204d225f4b89cfed33f99a519740dc8e.zip
Add more configuration options and small fix
Diffstat (limited to 'src/VeriFuzz/Gen.hs')
-rw-r--r--src/VeriFuzz/Gen.hs7
1 files changed, 4 insertions, 3 deletions
diff --git a/src/VeriFuzz/Gen.hs b/src/VeriFuzz/Gen.hs
index 5396701..b9545a8 100644
--- a/src/VeriFuzz/Gen.hs
+++ b/src/VeriFuzz/Gen.hs
@@ -150,14 +150,15 @@ askProbability = lift $ asks probability
assignment :: StateGen Assign
assignment = do
+ expr <- scopedExpr
lval <- lvalFromPort <$> newPort Reg
- Assign lval Nothing <$> scopedExpr
+ return $ Assign lval Nothing expr
conditional :: StateGen Statement
conditional = do
expr <- scopedExpr
stmntDepth -= 1
- tstat <- fold <$> some statement
+ tstat <- SeqBlock <$> some statement
stmntDepth += 1
return $ CondStmnt expr (Just tstat) Nothing
@@ -210,5 +211,5 @@ procedural config = VerilogSrc . (: []) . Description <$> Hog.resize
num
(runReaderT (evalStateT (moduleDef True) context) config)
where
- context = Context [] 0 5
+ context = Context [] 0 $ config ^. configProperty . propDepth
num = fromIntegral $ config ^. configProperty . propSize