aboutsummaryrefslogtreecommitdiffstats
path: root/src/VeriFuzz/Lexer.hs
diff options
context:
space:
mode:
authorYann Herklotz Grave <git@yannherklotzgrave.com>2019-02-17 11:41:38 +0000
committerYann Herklotz Grave <git@yannherklotzgrave.com>2019-02-17 11:41:38 +0000
commit0ea6e208f2c3c41922f8334174fc8e81a21d67f4 (patch)
tree3c4889aff5a85f58f7d4db296d7f2f26b8ad031f /src/VeriFuzz/Lexer.hs
parent08b2b306ae1accfa0b84dc3d327ba54add10a284 (diff)
downloadverismith-0ea6e208f2c3c41922f8334174fc8e81a21d67f4.tar.gz
verismith-0ea6e208f2c3c41922f8334174fc8e81a21d67f4.zip
Brittany formatting
Diffstat (limited to 'src/VeriFuzz/Lexer.hs')
-rw-r--r--src/VeriFuzz/Lexer.hs195
1 files changed, 170 insertions, 25 deletions
diff --git a/src/VeriFuzz/Lexer.hs b/src/VeriFuzz/Lexer.hs
index f06656b..9e9f35e 100644
--- a/src/VeriFuzz/Lexer.hs
+++ b/src/VeriFuzz/Lexer.hs
@@ -40,7 +40,8 @@ module VeriFuzz.Lexer
, semiSep1
, commaSep
, commaSep1
- ) where
+ )
+where
import Data.Char (digitToInt)
import Text.Parsec
@@ -53,9 +54,17 @@ type Lexer = P.TokenParser ()
type Parser = Parsec String ()
verilogDef :: VerilogDef
-verilogDef = P.LanguageDef "/*" "*/" "//" False letter (alphaNum <|> char '_')
- (oneOf ":!#%&*+./<=>?@\\^|-~") (oneOf ":!#%&*+./<=>?@\\^|-~")
- reserved' reservedOp' True
+verilogDef = P.LanguageDef "/*"
+ "*/"
+ "//"
+ False
+ letter
+ (alphaNum <|> char '_')
+ (oneOf ":!#%&*+./<=>?@\\^|-~")
+ (oneOf ":!#%&*+./<=>?@\\^|-~")
+ reserved'
+ reservedOp'
+ True
lexer :: Lexer
lexer = P.makeTokenParser verilogDef
@@ -96,7 +105,7 @@ decimal = P.decimal lexer
number :: Integer -> Parser Char -> Parser Integer
number base baseDigit = do
digits <- many1 baseDigit
- let n = foldl (\x d -> base*x + toInteger (digitToInt d)) 0 digits
+ let n = foldl (\x d -> base * x + toInteger (digitToInt d)) 0 digits
seq n (return n)
hexadecimal :: Parser Integer
@@ -151,26 +160,162 @@ commaSep1 :: Parser a -> Parser [a]
commaSep1 = P.commaSep1 lexer
reservedOp' :: [String]
-reservedOp' = [ "!", "~", "~&", "~|", "+", "-", "*", "/", "%", "==", "!=", "===", "!=="
- , "&&", "||", "<", "<=", ">", ">=", "&", "|", "^", "^~", "~^", "**", "<<"
- , ">>", "<<<", ">>>"
- ]
+reservedOp' =
+ [ "!"
+ , "~"
+ , "~&"
+ , "~|"
+ , "+"
+ , "-"
+ , "*"
+ , "/"
+ , "%"
+ , "=="
+ , "!="
+ , "==="
+ , "!=="
+ , "&&"
+ , "||"
+ , "<"
+ , "<="
+ , ">"
+ , ">="
+ , "&"
+ , "|"
+ , "^"
+ , "^~"
+ , "~^"
+ , "**"
+ , "<<"
+ , ">>"
+ , "<<<"
+ , ">>>"
+ ]
reserved' :: [String]
-reserved' = [ "always", "and", "assign", "automatic", "begin", "buf", "bufif0", "bufif1"
- , "case", "casex", "casez", "cell", "cmos", "config", "deassign", "default"
- , "defparam", "design", "disable", "edge", "else", "end", "endcase", "endconfig"
- , "endfunction", "endgenerate", "endmodule", "endprimitive", "endspecify", "endtable"
- , "endtask", "event", "for", "force", "forever", "fork", "function", "generate", "genvar"
- , "highz0", "highz1", "if", "ifnone", "incdir", "include", "initial", "inout", "input"
- , "instance", "integer", "join", "large", "liblist", "library", "localparam", "macromodule"
- , "medium", "module", "nand", "negedge", "nmos", "nor", "noshowcancelled", "not", "notif0"
- , "notif1", "or", "output", "parameter", "pmos", "posedge", "primitive", "pull0", "pull1"
- , "pulldown", "pullup", "pulsestyle_onevent", "pulsestyle_ondetect", "remos", "real"
- , "realtime", "reg", "release", "repeat", "rnmos", "rpmos", "rtran", "rtranif0", "rtranif1"
- , "scalared", "showcancelled", "signed", "small", "specify", "specparam", "strong0", "strong1"
- , "supply0", "supply1", "table", "task", "time", "tran", "tranif0", "tranif1", "tri", "tri0"
- , "tri1", "triand", "trior", "trireg", "unsigned", "use", "vectored", "wait", "wand", "weak0"
- , "weak1", "while", "wire", "wor", "xnor", "xor"
- ]
+reserved' =
+ [ "always"
+ , "and"
+ , "assign"
+ , "automatic"
+ , "begin"
+ , "buf"
+ , "bufif0"
+ , "bufif1"
+ , "case"
+ , "casex"
+ , "casez"
+ , "cell"
+ , "cmos"
+ , "config"
+ , "deassign"
+ , "default"
+ , "defparam"
+ , "design"
+ , "disable"
+ , "edge"
+ , "else"
+ , "end"
+ , "endcase"
+ , "endconfig"
+ , "endfunction"
+ , "endgenerate"
+ , "endmodule"
+ , "endprimitive"
+ , "endspecify"
+ , "endtable"
+ , "endtask"
+ , "event"
+ , "for"
+ , "force"
+ , "forever"
+ , "fork"
+ , "function"
+ , "generate"
+ , "genvar"
+ , "highz0"
+ , "highz1"
+ , "if"
+ , "ifnone"
+ , "incdir"
+ , "include"
+ , "initial"
+ , "inout"
+ , "input"
+ , "instance"
+ , "integer"
+ , "join"
+ , "large"
+ , "liblist"
+ , "library"
+ , "localparam"
+ , "macromodule"
+ , "medium"
+ , "module"
+ , "nand"
+ , "negedge"
+ , "nmos"
+ , "nor"
+ , "noshowcancelled"
+ , "not"
+ , "notif0"
+ , "notif1"
+ , "or"
+ , "output"
+ , "parameter"
+ , "pmos"
+ , "posedge"
+ , "primitive"
+ , "pull0"
+ , "pull1"
+ , "pulldown"
+ , "pullup"
+ , "pulsestyle_onevent"
+ , "pulsestyle_ondetect"
+ , "remos"
+ , "real"
+ , "realtime"
+ , "reg"
+ , "release"
+ , "repeat"
+ , "rnmos"
+ , "rpmos"
+ , "rtran"
+ , "rtranif0"
+ , "rtranif1"
+ , "scalared"
+ , "showcancelled"
+ , "signed"
+ , "small"
+ , "specify"
+ , "specparam"
+ , "strong0"
+ , "strong1"
+ , "supply0"
+ , "supply1"
+ , "table"
+ , "task"
+ , "time"
+ , "tran"
+ , "tranif0"
+ , "tranif1"
+ , "tri"
+ , "tri0"
+ , "tri1"
+ , "triand"
+ , "trior"
+ , "trireg"
+ , "unsigned"
+ , "use"
+ , "vectored"
+ , "wait"
+ , "wand"
+ , "weak0"
+ , "weak1"
+ , "while"
+ , "wire"
+ , "wor"
+ , "xnor"
+ , "xor"
+ ]