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| author | Yann Herklotz <git@ymhg.org> | 2019-05-06 18:59:08 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@ymhg.org> | 2019-05-06 18:59:08 +0100 |
| commit | 1e4798b9bfe090ac68c2edd036637b6bfac5c06b (patch) | |
| tree | 680f75c00e9e6ee7f49560a8f4509b74b08730ed /src/VeriFuzz/Reduce.hs | |
| parent | 4cdbcd7570009187954afe0c0308fa1eb4460c55 (diff) | |
| download | verismith-1e4798b9bfe090ac68c2edd036637b6bfac5c06b.tar.gz verismith-1e4798b9bfe090ac68c2edd036637b6bfac5c06b.zip | |
Support multiple reg assigns in if statements
Diffstat (limited to 'src/VeriFuzz/Reduce.hs')
| -rw-r--r-- | src/VeriFuzz/Reduce.hs | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/src/VeriFuzz/Reduce.hs b/src/VeriFuzz/Reduce.hs index e666f38..49d4dc9 100644 --- a/src/VeriFuzz/Reduce.hs +++ b/src/VeriFuzz/Reduce.hs @@ -102,12 +102,12 @@ cleanMod m newm = modify . change <$> newm $ l ^. modItems -halveStatements :: Statement -> Replacement Statement -halveStatements (SeqBlock l ) = SeqBlock <$> halve l -halveStatements (CondStmnt _ (Just a) b) = maybe (Single a) (Dual a) b -halveStatements (CondStmnt _ Nothing b) = maybe None Single b -halveStatements (ForLoop _ _ _ s ) = Single s -halveStatements _ = None +-- halveStatements :: Statement -> Replacement Statement +-- halveStatements (SeqBlock l ) = SeqBlock <$> halve l +-- halveStatements (CondStmnt _ (Just a) b) = maybe (Single a) (Dual a) b +-- halveStatements (CondStmnt _ Nothing b) = maybe None Single b +-- halveStatements (ForLoop _ _ _ s ) = Single s +-- halveStatements _ = None -- | Split a module declaration in half by trying to remove assign statements. halveAssigns :: SourceInfo -> Replacement SourceInfo |