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| author | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-25 16:27:35 +0000 |
|---|---|---|
| committer | Yann Herklotz Grave <git@yannherklotzgrave.com> | 2019-02-25 16:27:35 +0000 |
| commit | 79f7d262ed0246ea6556478c611c0db59bb47191 (patch) | |
| tree | 0ba641865d69e02345283553d0f636544ddea719 /src/VeriFuzz/Reduce.hs | |
| parent | d4b2664d8ecddbfa0e0aae42d32f39edae2f930b (diff) | |
| download | verismith-79f7d262ed0246ea6556478c611c0db59bb47191.tar.gz verismith-79f7d262ed0246ea6556478c611c0db59bb47191.zip | |
Reformat using brittany
Diffstat (limited to 'src/VeriFuzz/Reduce.hs')
| -rw-r--r-- | src/VeriFuzz/Reduce.hs | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/VeriFuzz/Reduce.hs b/src/VeriFuzz/Reduce.hs index 47cdcac..35eea4b 100644 --- a/src/VeriFuzz/Reduce.hs +++ b/src/VeriFuzz/Reduce.hs @@ -19,7 +19,8 @@ halve :: [a] -> ([a], [a]) halve l = splitAt (length l `div` 2) l removeUninitWires :: [ModItem] -> [ModItem] -removeUninitWires ms = ms where ids = ms ^.. traverse . modContAssign . contAssignNetLVal +removeUninitWires ms = ms + where ids = ms ^.. traverse . modContAssign . contAssignNetLVal halveModDecl :: ModDecl -> (ModDecl, ModDecl) halveModDecl m = (m & modItems %~ fst . halve, m & modItems %~ snd . halve) |