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| author | Yann Herklotz <git@ymhg.org> | 2019-04-15 19:44:29 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@ymhg.org> | 2019-04-15 19:44:29 +0100 |
| commit | 371c28e91b6602401c3991390cb2c76fe9812e3e (patch) | |
| tree | 37b80ce4c56a9770faa9ff429aa2a009a12984a7 /src/VeriFuzz/Sim/Internal.hs | |
| parent | 316547a7ed4e7a0d974d846e677059a2237f7ad5 (diff) | |
| download | verismith-371c28e91b6602401c3991390cb2c76fe9812e3e.tar.gz verismith-371c28e91b6602401c3991390cb2c76fe9812e3e.zip | |
Rename Synthesisor -> Synthesiser
Diffstat (limited to 'src/VeriFuzz/Sim/Internal.hs')
| -rw-r--r-- | src/VeriFuzz/Sim/Internal.hs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/VeriFuzz/Sim/Internal.hs b/src/VeriFuzz/Sim/Internal.hs index 4bfd5e9..3264d2e 100644 --- a/src/VeriFuzz/Sim/Internal.hs +++ b/src/VeriFuzz/Sim/Internal.hs @@ -13,7 +13,7 @@ Class of the simulator and the synthesize tool. module VeriFuzz.Sim.Internal ( Tool(..) , Simulator(..) - , Synthesisor(..) + , Synthesiser(..) , SourceInfo(..) , mainModule , rootPath @@ -56,9 +56,9 @@ class (Tool a) => Simulator a where -> [ByteString] -> Sh ByteString --- | Synthesisor type class. -class (Tool a) => Synthesisor a where - runSynth :: a -- ^ Synthesisor tool instance +-- | Synthesiser type class. +class (Tool a) => Synthesiser a where + runSynth :: a -- ^ Synthesiser tool instance -> SourceInfo -- ^ Run information -> FilePath -- ^ Output verilog file for the module -> Sh () -- ^ does not return any values |