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author | Yann Herklotz <git@ymhg.org> | 2019-04-18 23:42:48 +0100 |
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committer | Yann Herklotz <git@ymhg.org> | 2019-04-18 23:42:48 +0100 |
commit | 72ca7b273a8adf421d481e0caa97caa8a565187a (patch) | |
tree | 7b243629884be5104a61f7378973d6b38e22a998 /src/VeriFuzz/Sim/Internal.hs | |
parent | 97398438902d42b33aef475e3e357781582bec16 (diff) | |
download | verismith-72ca7b273a8adf421d481e0caa97caa8a565187a.tar.gz verismith-72ca7b273a8adf421d481e0caa97caa8a565187a.zip |
Add output information to Type
Diffstat (limited to 'src/VeriFuzz/Sim/Internal.hs')
-rw-r--r-- | src/VeriFuzz/Sim/Internal.hs | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/src/VeriFuzz/Sim/Internal.hs b/src/VeriFuzz/Sim/Internal.hs index 2d06819..6e02482 100644 --- a/src/VeriFuzz/Sim/Internal.hs +++ b/src/VeriFuzz/Sim/Internal.hs @@ -80,7 +80,6 @@ instance Monoid Failed where class Tool a => Synthesiser a where runSynth :: a -- ^ Synthesiser tool instance -> SourceInfo -- ^ Run information - -> FilePath -- ^ Output verilog file for the module -> ResultSh () -- ^ does not return any values synthOutput :: a -> FilePath setSynthOutput :: a -> FilePath -> a |