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author | Yann Herklotz <git@ymhg.org> | 2019-04-09 12:38:15 +0100 |
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committer | Yann Herklotz <git@ymhg.org> | 2019-04-09 12:38:15 +0100 |
commit | d350cd339797c6dd9056afa2b1dad5aed4c31cb9 (patch) | |
tree | 868474f18dfedc05d347cf16d09b5e770bc33293 /src/VeriFuzz/Sim/Internal.hs | |
parent | 7653f8fd33162b8b166a12e125c988663ec2fe79 (diff) | |
download | verismith-d350cd339797c6dd9056afa2b1dad5aed4c31cb9.tar.gz verismith-d350cd339797c6dd9056afa2b1dad5aed4c31cb9.zip |
Add Parameter type and remove Description
Diffstat (limited to 'src/VeriFuzz/Sim/Internal.hs')
-rw-r--r-- | src/VeriFuzz/Sim/Internal.hs | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/VeriFuzz/Sim/Internal.hs b/src/VeriFuzz/Sim/Internal.hs index 062035c..925b155 100644 --- a/src/VeriFuzz/Sim/Internal.hs +++ b/src/VeriFuzz/Sim/Internal.hs @@ -73,10 +73,10 @@ mainModule = lens get_ set_ where set_ (SourceInfo top main) v = SourceInfo top (main & getModule %~ update top v) - update top v m@(ModDecl (Identifier i) _ _ _) | i == top = v + update top v m@(ModDecl (Identifier i) _ _ _ _) | i == top = v | otherwise = m get_ (SourceInfo top main) = head . filter (f top) $ main ^.. getModule - f top (ModDecl (Identifier i) _ _ _) = i == top + f top (ModDecl (Identifier i) _ _ _ _) = i == top rootPath :: Sh FilePath rootPath = do |