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| author | Yann Herklotz <git@yannherklotz.com> | 2019-06-25 22:32:21 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-06-29 16:12:46 +0100 |
| commit | 24cf9ce5bf673615ebe36f5ab5d0ff7685dfada6 (patch) | |
| tree | 87e1bde306620e6a87b6d2589618a9432c3d0a75 /src/VeriFuzz/Sim/Template.hs | |
| parent | a3cf56b7e2edef87181c534dea099a884ac99306 (diff) | |
| download | verismith-24cf9ce5bf673615ebe36f5ab5d0ff7685dfada6.tar.gz verismith-24cf9ce5bf673615ebe36f5ab5d0ff7685dfada6.zip | |
Add back the simulation
Diffstat (limited to 'src/VeriFuzz/Sim/Template.hs')
| -rw-r--r-- | src/VeriFuzz/Sim/Template.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Sim/Template.hs b/src/VeriFuzz/Sim/Template.hs index 913b220..3be6558 100644 --- a/src/VeriFuzz/Sim/Template.hs +++ b/src/VeriFuzz/Sim/Template.hs @@ -127,7 +127,7 @@ icarusTestbench t synth1 = [st| `include "data/cells_verific.v" `include "data/cells_xilinx_7.v" `include "data/cells_yosys.v" -`include "#{synthOutput synth1}" +`include "#{toTextIgnore $ synthOutput synth1}" #{genSource t} |] |