diff options
| author | Yann Herklotz <git@yannherklotz.com> | 2019-06-05 13:52:20 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-06-05 13:52:27 +0100 |
| commit | 720fa7a822a077458cf0b29e9dcdc754a881e8bd (patch) | |
| tree | fa00db795c17bba78b02de2823c1092fae1d81ec /src/VeriFuzz/Sim/Vivado.hs | |
| parent | f3268d934a9a2b01633b5f7a3353d1a97c40a9df (diff) | |
| download | verismith-720fa7a822a077458cf0b29e9dcdc754a881e8bd.tar.gz verismith-720fa7a822a077458cf0b29e9dcdc754a881e8bd.zip | |
Format all files
Diffstat (limited to 'src/VeriFuzz/Sim/Vivado.hs')
| -rw-r--r-- | src/VeriFuzz/Sim/Vivado.hs | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/src/VeriFuzz/Sim/Vivado.hs b/src/VeriFuzz/Sim/Vivado.hs index 90eed2d..a4feb07 100644 --- a/src/VeriFuzz/Sim/Vivado.hs +++ b/src/VeriFuzz/Sim/Vivado.hs @@ -56,7 +56,12 @@ runSynthVivado sim (SourceInfo top src) = do writefile vivadoTcl . vivadoSynthConfig top . toTextIgnore $ synthOutput sim writefile "rtl.v" $ genSource src - run_ "sed" ["s/^module/(* use_dsp48=\"no\" *) (* use_dsp=\"no\" *) module/;", "-i", "rtl.v"] + run_ + "sed" + [ "s/^module/(* use_dsp48=\"no\" *) (* use_dsp=\"no\" *) module/;" + , "-i" + , "rtl.v" + ] let exec_ n = execute_ SynthFail dir |