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| author | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:23:33 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:23:33 +0100 |
| commit | 8fdae391516016f8ab33a13ee8f1d03adfa7b53c (patch) | |
| tree | 7b8bfd6f4f5ee09dd128e4cfff4829a6d73dea4e /src/VeriFuzz/Sim | |
| parent | 7fe9da98d5f13fc8a3f73c75e34f931732511e5b (diff) | |
| download | verismith-8fdae391516016f8ab33a13ee8f1d03adfa7b53c.tar.gz verismith-8fdae391516016f8ab33a13ee8f1d03adfa7b53c.zip | |
Change port declarations in Reduce
Diffstat (limited to 'src/VeriFuzz/Sim')
| -rw-r--r-- | src/VeriFuzz/Sim/Reduce.hs | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/src/VeriFuzz/Sim/Reduce.hs b/src/VeriFuzz/Sim/Reduce.hs index 361df3e..3e3b1da 100644 --- a/src/VeriFuzz/Sim/Reduce.hs +++ b/src/VeriFuzz/Sim/Reduce.hs @@ -63,12 +63,12 @@ combine :: Lens' a b -> (b -> Replacement b) -> a -> Replacement a combine l f i = modify <$> f (i ^. l) where modify res = i & l .~ res filterExpr :: [Identifier] -> Expr -> Expr -filterExpr ids (Id i) = if i `notElem` ids then Number 1 0 else Id i +filterExpr ids (Id i) = if i `notElem` ids then Number 0 else Id i filterExpr _ e = e filterDecl :: [Identifier] -> ModItem -> Bool -filterDecl ids (Decl Nothing (Port _ _ _ _ i) _) = i `elem` ids -filterDecl _ _ = True +filterDecl ids (Decl Nothing (Port _ _ _ i) _) = i `elem` ids +filterDecl _ _ = True filterAssigns :: [Port] -> ModItem -> Bool filterAssigns out (ModCA (ContAssign i _)) = @@ -112,7 +112,7 @@ halveIndExpr (Concat l ) = Concat <$> halve l halveIndExpr (BinOp e1 _ e2) = Dual e1 e2 halveIndExpr (Cond _ e1 e2) = Dual e1 e2 halveIndExpr (UnOp _ e ) = Single e -halveIndExpr (Func _ e ) = Single e +halveIndExpr (Appl _ e ) = Single e halveIndExpr e = Single e halveModExpr :: ModItem -> Replacement ModItem |