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author | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:21:06 +0100 |
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committer | Yann Herklotz <git@ymhg.org> | 2019-04-14 20:21:06 +0100 |
commit | 73b7b059a463e40f7a223d179ba42d17696a4a33 (patch) | |
tree | df7b450fa6d453e177faca9d1eb5c2204f41eae9 /src/VeriFuzz/Sim | |
parent | fabadfd1314ee5f1032a109a3182747d5bfecbb6 (diff) | |
download | verismith-73b7b059a463e40f7a223d179ba42d17696a4a33.tar.gz verismith-73b7b059a463e40f7a223d179ba42d17696a4a33.zip |
Add Quartus implementation
Diffstat (limited to 'src/VeriFuzz/Sim')
-rw-r--r-- | src/VeriFuzz/Sim/Quartus.hs | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/src/VeriFuzz/Sim/Quartus.hs b/src/VeriFuzz/Sim/Quartus.hs new file mode 100644 index 0000000..fb88047 --- /dev/null +++ b/src/VeriFuzz/Sim/Quartus.hs @@ -0,0 +1,52 @@ +{-| +Module : VeriFuzz.Sim.Quartus +Description : Quartus synthesiser implementation. +Copyright : (c) 2019, Yann Herklotz Grave +License : GPL-3 +Maintainer : ymherklotz [at] gmail [dot] com +Stability : experimental +Portability : POSIX + +Quartus synthesiser implementation. +-} + +module VeriFuzz.Sim.Quartus + ( Quartus(..) + , defaultQuartus + ) +where + +import Prelude hiding (FilePath) +import Shelly +import VeriFuzz.Sim.Internal +import VeriFuzz.Verilog.CodeGen + +newtype Quartus = Quartus { quartusBin :: Maybe FilePath } + deriving (Eq, Show) + +instance Tool Quartus where + toText _ = "quartus" + +instance Synthesisor Quartus where + runSynth = runSynthQuartus + +defaultQuartus :: Quartus +defaultQuartus = Quartus Nothing + +runSynthQuartus :: Quartus -> SourceInfo -> FilePath -> Sh () +runSynthQuartus sim (SourceInfo top src) outf = do + dir <- pwd + writefile inpf $ genSource src + echoP "Running Quartus synthesis" + logger_ dir "quartus" $ timeout + (exec "quartus_map") + [top, "--source=" <> toTextIgnore inpf, "--family=Cyclone V"] + logger_ dir "quartus" + $ timeout (exec "quartus_fit") [top, "--part=5CGXFC7D6F27C6"] + logger_ dir "quartus" + $ timeout (exec "quartus_eda") [top, "--simulation", "--tool=vcs"] -- --formal_verification --tool=conformal + cp (fromText "simulation/vcs" </> fromText top <.> "vo") outf + echoP "Quartus synthesis done" + where + inpf = "rtl.v" + exec s = maybe (fromText s) (</> fromText s) $ quartusBin sim |