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| author | Yann Herklotz <git@yannherklotz.com> | 2019-05-25 23:26:27 +0100 |
|---|---|---|
| committer | Yann Herklotz <git@yannherklotz.com> | 2019-05-25 23:26:27 +0100 |
| commit | 11bd73faa516cde0af74e5359c36c8f1fa4e816a (patch) | |
| tree | 55761b9b97d547686a565943a490eb58d93d3f18 /src/VeriFuzz/Verilog.hs | |
| parent | 3ad518489f1528941d4d059e594ad9ac1d22fd0d (diff) | |
| download | verismith-11bd73faa516cde0af74e5359c36c8f1fa4e816a.tar.gz verismith-11bd73faa516cde0af74e5359c36c8f1fa4e816a.zip | |
Fix reduction for statements
Diffstat (limited to 'src/VeriFuzz/Verilog.hs')
| -rw-r--r-- | src/VeriFuzz/Verilog.hs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog.hs b/src/VeriFuzz/Verilog.hs index 3e8d2c7..628b00a 100644 --- a/src/VeriFuzz/Verilog.hs +++ b/src/VeriFuzz/Verilog.hs @@ -10,6 +10,8 @@ Portability : POSIX Verilog implementation with random generation and mutations. -} +{-# LANGUAGE QuasiQuotes #-} + module VeriFuzz.Verilog ( SourceInfo(..) , Verilog(..) |