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author | Yann Herklotz <git@yannherklotz.com> | 2019-08-29 15:44:33 +1000 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2019-08-29 15:44:33 +1000 |
commit | cccb665ebac6e916c4f961eacbe11a9af7d7ceb3 (patch) | |
tree | f00baaec9dcb747c27375af366ad9aec9d2dbe16 /src/VeriFuzz/Verilog/AST.hs | |
parent | 74a14ef30359e653259bf7139fe806548edefd14 (diff) | |
download | verismith-cccb665ebac6e916c4f961eacbe11a9af7d7ceb3.tar.gz verismith-cccb665ebac6e916c4f961eacbe11a9af7d7ceb3.zip |
Change name from VeriFuzz to VeriSmith
Diffstat (limited to 'src/VeriFuzz/Verilog/AST.hs')
-rw-r--r-- | src/VeriFuzz/Verilog/AST.hs | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/src/VeriFuzz/Verilog/AST.hs b/src/VeriFuzz/Verilog/AST.hs index a85c365..78bad45 100644 --- a/src/VeriFuzz/Verilog/AST.hs +++ b/src/VeriFuzz/Verilog/AST.hs @@ -1,5 +1,5 @@ {-| -Module : VeriFuzz.Verilog.AST +Module : VeriSmith.Verilog.AST Description : Definition of the Verilog AST types. Copyright : (c) 2018-2019, Yann Herklotz License : BSD-3 @@ -22,7 +22,7 @@ Defines the types to build a Verilog AST. {-# LANGUAGE TemplateHaskell #-} {-# LANGUAGE TypeFamilies #-} -module VeriFuzz.Verilog.AST +module VeriSmith.Verilog.AST ( -- * Top level types SourceInfo(..) , infoTop @@ -150,7 +150,7 @@ import Data.String (IsString, fromString) import Data.Text (Text, pack) import Data.Traversable (sequenceA) import GHC.Generics (Generic) -import VeriFuzz.Verilog.BitVec +import VeriSmith.Verilog.BitVec -- | Identifier in Verilog. This is just a string of characters that can either -- be lowercase and uppercase for now. This might change in the future though, |