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author | Yann Herklotz <git@ymhg.org> | 2019-04-21 07:19:23 +0100 |
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committer | Yann Herklotz <git@ymhg.org> | 2019-04-21 07:19:35 +0100 |
commit | 879d1d3522d5693d8621164cfb09fb830ea2ef0c (patch) | |
tree | db52e8a9ce21e7c4233a859d2f45e6af5f8ce755 /src/VeriFuzz/Verilog/AST.hs | |
parent | 8f7d6e4ee2941c592a33510687a724c4c733d403 (diff) | |
download | verismith-879d1d3522d5693d8621164cfb09fb830ea2ef0c.tar.gz verismith-879d1d3522d5693d8621164cfb09fb830ea2ef0c.zip |
Add support for more event lists
Diffstat (limited to 'src/VeriFuzz/Verilog/AST.hs')
-rw-r--r-- | src/VeriFuzz/Verilog/AST.hs | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog/AST.hs b/src/VeriFuzz/Verilog/AST.hs index 0ef9057..f122214 100644 --- a/src/VeriFuzz/Verilog/AST.hs +++ b/src/VeriFuzz/Verilog/AST.hs @@ -158,6 +158,8 @@ data Event = EId {-# UNPACK #-} !Identifier | EAll | EPosEdge {-# UNPACK #-} !Identifier | ENegEdge {-# UNPACK #-} !Identifier + | EOr !Event !Event + | EComb !Event !Event deriving (Eq, Show, Ord, Data) -- | Binary operators that are currently supported in the verilog generation. @@ -477,6 +479,7 @@ $(makeWrapped ''Verilog) $(makeWrapped ''Identifier) $(makeWrapped ''Delay) +$(makeBaseFunctor ''Event) $(makeBaseFunctor ''Expr) $(makeBaseFunctor ''ConstExpr) |