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author | Yann Herklotz <git@ymhg.org> | 2019-05-14 18:46:02 +0100 |
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committer | Yann Herklotz <git@ymhg.org> | 2019-05-14 18:46:02 +0100 |
commit | 777bd910952496b8bff5fd2795badc32d5c0561b (patch) | |
tree | feb8a18bcced9a13c7ff5c42e21d152418cb5495 /src/VeriFuzz/Verilog/AST.hs | |
parent | 128b36c02d7f6900a483b6108e6aabb237388d1a (diff) | |
download | verismith-777bd910952496b8bff5fd2795badc32d5c0561b.tar.gz verismith-777bd910952496b8bff5fd2795badc32d5c0561b.zip |
Add lens to focus on specific module
Diffstat (limited to 'src/VeriFuzz/Verilog/AST.hs')
-rw-r--r-- | src/VeriFuzz/Verilog/AST.hs | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/src/VeriFuzz/Verilog/AST.hs b/src/VeriFuzz/Verilog/AST.hs index 52155db..7fa2fbd 100644 --- a/src/VeriFuzz/Verilog/AST.hs +++ b/src/VeriFuzz/Verilog/AST.hs @@ -17,6 +17,7 @@ Defines the types to build a Verilog AST. {-# LANGUAGE FlexibleInstances #-} {-# LANGUAGE GeneralizedNewtypeDeriving #-} {-# LANGUAGE MultiParamTypeClasses #-} +{-# LANGUAGE RankNTypes #-} {-# LANGUAGE TemplateHaskell #-} {-# LANGUAGE TypeFamilies #-} @@ -132,6 +133,7 @@ module VeriFuzz.Verilog.AST , modConnName , modExpr -- * Useful Lenses and Traversals + , aModule , getModule , getSourceId , mainModule @@ -527,6 +529,19 @@ getSourceId = getModule . modId . _Wrapped -- | May need to change this to Traversal to be safe. For now it will fail when -- the main has not been properly set with. +aModule :: Text -> Lens' SourceInfo ModDecl +aModule t = lens get_ set_ + where + set_ (SourceInfo top main) v = + SourceInfo top (main & getModule %~ update t v) + update top v m@(ModDecl (Identifier i) _ _ _ _) | i == top = v + | otherwise = m + get_ (SourceInfo _ main) = head . filter (f t) $ main ^.. getModule + f top (ModDecl (Identifier i) _ _ _ _) = i == top + + +-- | May need to change this to Traversal to be safe. For now it will fail when +-- the main has not been properly set with. mainModule :: Lens' SourceInfo ModDecl mainModule = lens get_ set_ where |