Set column to 100

1 files changed, 15 insertions, 33 deletions

diff --git a/src/VeriFuzz/Verilog/CodeGen.hs b/src/VeriFuzz/Verilog/CodeGen.hs
index 338838f..34194a6 100644
--- a/src/VeriFuzz/Verilog/CodeGen.hs
+++ b/src/VeriFuzz/Verilog/CodeGen.hs
@@ -55,14 +55,7 @@ genDescription desc = genModuleDecl $ desc ^. getDescription
 -- | Generate the 'ModDecl' for a module and convert it to 'Text'.
 genModuleDecl :: ModDecl -> Text
 genModuleDecl m =
-  "module "
-    <> m
-    ^. moduleId
-    .  getIdentifier
-    <> ports
-    <> ";\n"
-    <> modI
-    <> "endmodule\n"
+  "module " <> m ^. moduleId . getIdentifier <> ports <> ";\n" <> modI <> "endmodule\n"
  where
   ports | noIn && noOut = ""
         | otherwise     = "(" <> comma (genModPort <$> outIn) <> ")"
@@ -96,10 +89,9 @@ genModuleItem :: ModItem -> Text
 genModuleItem (ModCA ca) = genContAssign ca
 genModuleItem (ModInst (Identifier i) (Identifier name) conn) =
   i <> " " <> name <> "(" <> comma (genExpr . _modConn <$> conn) <> ")" <> ";\n"
-genModuleItem (Initial stat) = "initial " <> genStmnt stat
-genModuleItem (Always  stat) = "always " <> genStmnt stat
-genModuleItem (Decl dir port) =
-  (maybe "" makePort dir) <> genPort port <> ";\n"
+genModuleItem (Initial stat ) = "initial " <> genStmnt stat
+genModuleItem (Always  stat ) = "always " <> genStmnt stat
+genModuleItem (Decl dir port) = (maybe "" makePort dir) <> genPort port <> ";\n"
   where makePort = (<> " ") . genPortDir
 
 -- | Generate continuous assignment
@@ -111,15 +103,13 @@ genContAssign (ContAssign val e) = "assign " <> name <> " = " <> expr <> ";\n"
 
 -- | Generate 'Expr' to 'Text'.
 genExpr :: Expr -> Text
-genExpr (BinOp eRhs bin eLhs) =
-  "(" <> genExpr eRhs <> genBinaryOperator bin <> genExpr eLhs <> ")"
-genExpr (Number s n) = showT s <> "'h" <> T.pack (showHex n "")
-genExpr (Id     i  ) = i ^. getIdentifier
-genExpr (Concat c  ) = "{" <> comma (genExpr <$> c) <> "}"
-genExpr (UnOp u e  ) = "(" <> genUnaryOperator u <> genExpr e <> ")"
-genExpr (Cond l t f) =
-  "(" <> genExpr l <> " ? " <> genExpr t <> " : " <> genExpr f <> ")"
-genExpr (Str t) = "\"" <> t <> "\""
+genExpr (BinOp eRhs bin eLhs) = "(" <> genExpr eRhs <> genBinaryOperator bin <> genExpr eLhs <> ")"
+genExpr (Number s n         ) = showT s <> "'h" <> T.pack (showHex n "")
+genExpr (Id     i           ) = i ^. getIdentifier
+genExpr (Concat c           ) = "{" <> comma (genExpr <$> c) <> "}"
+genExpr (UnOp u e           ) = "(" <> genUnaryOperator u <> genExpr e <> ")"
+genExpr (Cond l t f         ) = "(" <> genExpr l <> " ? " <> genExpr t <> " : " <> genExpr f <> ")"
+genExpr (Str t              ) = "\"" <> t <> "\""
 
 -- | Convert 'BinaryOperator' to 'Text'.
 genBinaryOperator :: BinaryOperator -> Text
@@ -177,13 +167,7 @@ genLVal :: LVal -> Text
 genLVal (RegId i       ) = i ^. getIdentifier
 genLVal (RegExpr i expr) = i ^. getIdentifier <> " [" <> genExpr expr <> "]"
 genLVal (RegSize i msb lsb) =
-  i
-    ^. getIdentifier
-    <> " ["
-    <> genConstExpr msb
-    <> ":"
-    <> genConstExpr lsb
-    <> "]"
+  i ^. getIdentifier <> " [" <> genConstExpr msb <> ":" <> genConstExpr lsb <> "]"
 genLVal (RegConcat e) = "{" <> comma (genExpr <$> e) <> "}"
 
 genConstExpr :: ConstExpr -> Text
@@ -195,8 +179,7 @@ genPortType (Reg signed) | signed    = "reg signed"
                          | otherwise = "reg"
 
 genAssign :: Text -> Assign -> Text
-genAssign op (Assign r d e) =
-  genLVal r <> op <> maybe "" genDelay d <> genExpr e
+genAssign op (Assign r d e) = genLVal r <> op <> maybe "" genDelay d <> genExpr e
 
 genStmnt :: Stmnt -> Text
 genStmnt (TimeCtrl  d stat   ) = genDelay d <> " " <> defMap stat
@@ -209,9 +192,8 @@ genStmnt (TaskEnable     task) = genTask task <> ";\n"
 genStmnt (SysTaskEnable  task) = "$" <> genTask task <> ";\n"
 
 genTask :: Task -> Text
-genTask (Task name expr)
-  | null expr = i
-  | otherwise = i <> "(" <> comma (genExpr <$> expr) <> ")"
+genTask (Task name expr) | null expr = i
+                         | otherwise = i <> "(" <> comma (genExpr <$> expr) <> ")"
   where i = name ^. getIdentifier
 
 -- | Render the 'Text' to 'IO'. This is equivalent to 'putStrLn'.