diff options
author | Yann Herklotz <git@ymhg.org> | 2019-04-15 20:37:15 +0100 |
---|---|---|
committer | Yann Herklotz <git@ymhg.org> | 2019-04-15 20:37:15 +0100 |
commit | 053be2bd7b06ecb371fa0e163d4d1c3e17fe0df3 (patch) | |
tree | 682785734f9c8447265ae9b2192d54d7860c5619 /src/VeriFuzz/Verilog/Gen.hs | |
parent | 705bdb142b1088676ddc3178d8677bd40ab2b1d6 (diff) | |
download | verismith-053be2bd7b06ecb371fa0e163d4d1c3e17fe0df3.tar.gz verismith-053be2bd7b06ecb371fa0e163d4d1c3e17fe0df3.zip |
Move declaration of SourceInfo
Diffstat (limited to 'src/VeriFuzz/Verilog/Gen.hs')
-rw-r--r-- | src/VeriFuzz/Verilog/Gen.hs | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/src/VeriFuzz/Verilog/Gen.hs b/src/VeriFuzz/Verilog/Gen.hs index a6ebbd9..46cdc25 100644 --- a/src/VeriFuzz/Verilog/Gen.hs +++ b/src/VeriFuzz/Verilog/Gen.hs @@ -436,10 +436,11 @@ moduleDef top = do -- | Procedural generation method for random Verilog. Uses internal 'Reader' and -- 'State' to keep track of the current Verilog code structure. -procedural :: Config -> Gen Verilog -procedural config = do - (mainMod, st) <- Hog.resize num - $ runReaderT (runStateT (moduleDef (Just "top")) context) config +procedural :: T.Text -> Config -> Gen Verilog +procedural top config = do + (mainMod, st) <- Hog.resize num $ runReaderT + (runStateT (moduleDef (Just $ Identifier top)) context) + config return . Verilog $ mainMod : st ^. modules where context = @@ -447,5 +448,5 @@ procedural config = do num = fromIntegral $ confProp propSize confProp i = config ^. configProperty . i -proceduralIO :: Config -> IO Verilog -proceduralIO = Hog.sample . procedural +proceduralIO :: T.Text -> Config -> IO Verilog +proceduralIO t = Hog.sample . procedural t |