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author | Yann Herklotz <git@yannherklotz.com> | 2019-06-29 20:33:59 +0100 |
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committer | Yann Herklotz <git@yannherklotz.com> | 2019-06-29 20:33:59 +0100 |
commit | d32f4cc45bc8c0670fb788b1fcd4c2f2b15fa094 (patch) | |
tree | 9aee938477a884daa20148b56fc1feef52d4f2c4 /src/VeriFuzz/Verilog/Internal.hs | |
parent | bb697f8bc7b593e5aabb43505f686e6503b7726f (diff) | |
download | verismith-d32f4cc45bc8c0670fb788b1fcd4c2f2b15fa094.tar.gz verismith-d32f4cc45bc8c0670fb788b1fcd4c2f2b15fa094.zip |
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Diffstat (limited to 'src/VeriFuzz/Verilog/Internal.hs')
-rw-r--r-- | src/VeriFuzz/Verilog/Internal.hs | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/VeriFuzz/Verilog/Internal.hs b/src/VeriFuzz/Verilog/Internal.hs index 8d19c14..16148cf 100644 --- a/src/VeriFuzz/Verilog/Internal.hs +++ b/src/VeriFuzz/Verilog/Internal.hs @@ -29,7 +29,7 @@ module VeriFuzz.Verilog.Internal where import Control.Lens -import Data.Text (Text) +import Data.Text ( Text ) import VeriFuzz.Verilog.AST regDecl :: Identifier -> ModItem |